Hi Tom,
We are currently working in TMS320C6678. How to Enable ECC option for DDR3 in the GEL file. I have tried as per the KeyStone Architecture DDR3 Memory Controller. And the steps I followed are given bellow.
I have configured the
1. ECC control Register (ECCCNT) 0x2100110(offset) = 0xC0000003
2. ECC Address Range 1 Register (ECCADDR1) 0x2100114(offset) = 0x001F0000
3. ECC Address Range 2 Register (ECCADDR2) 0x2100118(offset) = 0x003F0020
I have added the above 3 register values in the GEL file as shown bellow
DDR_ZQCFG = 0x70073214;
DDR_ECCCTL = 0xC0000000;
DDR_ECCADDR1 = 0x001F0000;
DDR_ECCADDR2 = 0x003F0020;
DDR_PMCTL = 0x0;
DDR_SDRFC = 0x00005161;
When I tried to use the changes made GEL file the bellow errors are shown.
C66xx_8: GEL: Error while executing OnTargetConnect():
Memory map prevented writing of target memory at 0x21000110 at *((unsigned int *) (0x21000000+0x00000110))=0xC0000003 [ccsv5-rem.gel:2044] at ddr3_setup_auto_lvl_1333(0)
[ccsv5-rem.gel:749] at Global_Default_Setup_Silent()
[ccsv5-rem.gel:459] at OnTargetConnect() .
We have also checked the Status register (STATUS) 0x21000004(offset) = 0x40000004
Can you provide any GEL file sample which consist of ECC support for DDR3.
Regards,
Avinash N