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[AM335x] GEMAC - RMII Stuck at 10 Mbit/s Mode

AM335x Champs,
We've been able to get the GEMAC up and running using RMII.  However, we are stuck in 10Mbit/sec speeds, 1.1Mbyte/sec in fact, and are trying to acheive the 100Mbits speeds. We've included a scope shot of the REFCLK.  We are using the the LAN8720, which is the RMII version of the LAN8710 used on the Beaglebone and have boot strapped it to work in auto-negotiate mode.
 
Linux is indicating the following:
Inteface is up and auto-negotiating at 10Mbs
root@arm:~# ethtool eth0
Settings for eth0:
        Supported ports: [ TP MII ]
        Supported link modes:   10baseT/Half 10baseT/Full
        Supported pause frame use: Symmetric Receive-only
        Supports auto-negotiation: Yes
        Advertised link modes:  10baseT/Half 10baseT/Full
        Advertised pause frame use: Symmetric Receive-only
        Advertised auto-negotiation: Yes
       Speed: 10Mb/s
        Duplex: Full
        Port: MII
        PHYAD: 0
        Transceiver: external
        Auto-negotiation: on
        Current message level: 0x00000000 (0)
        Link detected: yes
Copying 100MB file:
data.bin   100%   51MB   1.1MB/s   00:47
Only 1 packet dropped, i.e. almost zero error rate
eth0      Link encap:Ethernet  HWaddr bc:6a:29:57:3e:dc
          inet addr:192.168.98.101  Bcast:192.168.98.255  Mask:255.255.255.0
          inet6 addr: fe80::be6a:29ff:fe57:3edc/64 Scope:Link
          UP BROADCAST RUNNING ALLMULTI MULTICAST  MTU:1500  Metric:1
          RX packets:48946 errors:0 dropped:1 overruns:0 frame:0
          TX packets:20632 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:57984084 (55.2 MiB)  TX bytes:1419359 (1.3 MiB)
Linux also shows interface operating at 10MBPs
root@arm:~# ifconfig eth0 up
[ 1855.735443] net eth0: CPSW phy found : id is : 0x7c0f1
[ 1855.753204] ADDRCONF(NETDEV_UP): eth0: link is not ready
root@arm:~# [ 1859.729888] PHY: 0:00 - Link is Up - 10/Full
[ 1859.734924] ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
 
Reading the PHY's configuration Register seems to indicate a form of 100MB/s was negotiated, see the 0111100000101101 value read from the phy basic status register.  The values for these bit fields are:
 
15 100BASE-T4
0 = no T4 ability
1 = T4 able
Value: 0b
 
14 100BASE-TX Full Duplex
0 = no TX full duplex ability
1 = TX with full duplex
Value: 1b
 
13 100BASE-TX Half Duplex
0 = no TX half duplex ability
1 = TX with half duplex
Value: 1b
 
12 10BASE-T Full Duplex
0 = no 10Mbps with full duplex ability
1 = 10Mbps with full duplex
Value: 1b
 
11 10BASE-T Half Duplex
0 = no 10Mbps with half duplex ability
1 = 10Mbps with half duplex
Value: 1b
 
10 100BASE-T2 Full Duplex
0 = PHY not able to perform full duplex 100BASE-T2
1 = PHY able to perform full duplex 100BASE-T2
Value: 0b
 
9 100BASE-T2 Half Duplex
0 = PHY not able to perform half duplex 100BASE-T2
1 = PHY able to perform half duplex 100BASE-T2
Value: 0b
 
8 Extended Status
0 = no extended status information in register 15
1 = extended status information in register 15
Value: 0b

7:6 RESERVED RO –

5 Auto-Negotiate Complete
0 = auto-negotiate process not completed
1 = auto-negotiate process completed
Value: 0b
 
4 Remote Fault
1 = remote fault condition detected
0 = no remote fault
Value: 0b
 
3 Auto-Negotiate Ability
0 = unable to perform auto-negotiation function
1 = able to perform auto-negotiation function
Value: 1b
 
2 Link Status
0 = link is down
1 = link is up
Value: 0b
 
1 Jabber Detect
0 = no jabber condition detected
1 = jabber condition detected
Value: 0b
 
0 Extended Capabilities
0 = does not support extended capabilities registers
1 = supports extended capabilities registers
Value: 1b
 
So this indicates 100MB/s was negotiated, but not 100BASE-T2 Full Duplex. 
 
Could this be causing Linux negotiate to the lower speeds?
Could this be HW/CLK related?
 
REFCLK Scope:
Link to LAN8720 Datasheet:

 

Previous Related Threads:
[AM335x] Board Porting - BeagleBone MII to 2xRMII
Ethernet problem in U-Boot - can't ping

 

  • Michael,

    Please dump the following:

    The entire PHY register set (Index 0:31)

    The AM335x MACCONTROL register.

    The AM335x GMII_SEL register.

     

    -DK

  • Control Module 0x44E1_0000 0x44E1_1FFF 128KB Control Module Registers
    9.3.31 gmii_sel Register (offset = 650h) [reset = 0h]
    Control Module gmii_sel Register -> 0x44E1_0650
    Value: 0x000000F5
     
    CPSW_SL1 0x4A10_0D80 0x4A10_0DBF Ethernet Sliver for Port 1
    14.5.7.2 MACCONTROL Register (offset = 4h) [reset = 0h]
    CPSW_SL1 MACCONTROL -> 0x4A10_0D84
    Value: 0x00040021
  • Thanks Michael,

    Could you provide the PHY register set also?

  • Dk,

    Can you describe a methodology to perform a PHY registery dump?

    ethtool –d indicates that our phy is not supported…

    Thanks!

  • Michael,

    The PHY registers themselves can be accessed directly via the MDIOUSERACCESSn registers in AM335x. Please take a look at section 14.4.5 of the TRM for details on this functionality.

  • MDIO 0x4A10_1000 - 0x4A10_10FF Ethernet MDIO
    Offset 80h MDIOUSERACCESS0 MDIO User Access Register 0
    MDIOUSERACCESS0 - 0x4A10_1080
    0 - 80000000 --> 2000_3100
    1 - 80200000 --> 2020_782D
    2 - 80400000 --> 2040_0007
    3 - 80600000 --> 2060_C0F1
    4 - 80800000 --> 2080_0C61
    5 - 80A00000 --> 20A0_4DE1
    6 - 80C00000 --> 20C0_0003
    17 - 82200000 --> 2220_2002
    18 - 82400000 --> 2240_60E0
    26 - 83400000 --> 2340_0000
    27 - 83600000 --> 2360_000A
    29 - 83A00000 --> 23A0_00C8
    30 - 83C00000 --> 23C0_0000
    31 - 83E00000 --> 23E0_1054
     
    SMSC 8720 Manual:
     
    Next item to check:

    MACCONTROL Registers. Do the MAC and PHY agree on the link parameters (speed, duplex, etc)?

     
  • AM335x Register Map:
    CPSW_SL1 0x4A10_0D80 0x4A10_0DBF Ethernet Sliver for Port 1
    CPSW_SL2 0x4A10_0DC0 0x4A10_0DFF Ethernet Sliver for Port 2

    4h MACCONTROL CPGMAC_SL MAC CONTROL REGISTER Section 14.5.7.2
    8h MACSTATUS CPGMAC_SL MAC STATUS REGISTER Section 14.5.7.3

    AM335x Internal Macontrol registers at uboot
    CPSW_SL1 MACCONTROL 0x4A100D84        --> 0x00008021
    CPSW_SL1 MACSTATUS 0x4A100D88        --> 0x80000000

    AM335x Internal Macontrol registers at after kernel boot up
    CPSW_SL1 MACCONTROL 0x4A100D84        --> 0x00040021
    CPSW_SL1 MACSTATUS 0x4A100D88        --> 0x80000000
  • After looking into the PHY registers we found that the PHY itself is only advertising 10Mbit support as part of auto-negotiation.

     In the PHY Basic Status Register, we can see that auto-negotiation is enabled (bit 3) and completed successfully (bit 5), but in the PHY Auto Negotiation Advertisement register bits 7 and 8 are clear indicating to the MAC that 100Mbit is not supported. This is very likely the root cause of the failure to negotiate 100Mb. Please note that these bits are set by the PHY MODE[2:0] configuration straps. 

    Update:

    Since these boot strap pins are set to 111 or All-Capable/Auto-negotiate it is apparent the it is actually the PHY that is actually determining that it cannot run at 100Mbs.   Please see the attached PDF for a break down of the PHY settings with their measured values. 

    5621.Phy_registers.pdf

    You can try to force the PHY into 100Mbs mode by settings the MODE[2:0] to 011, however this may result in a larger amount of packet loss.