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6678 sgmii link up failure problem

Other Parts Discussed in Thread: TMS320C6672

I've test the helloworld example in MCSDK on the evm board ,by changing some part of the project  , I can send udp packet from the board to PC succussefully.

Now, I'm working on my board to try the same thing, But it seems not working .

my board is made reffering to the evm, but it has two 88e1111 connecting to both of the two sgmii port.

The project is as follows:

I move the evm_init into main function  to have easier debugging, and i dispatch some of the important function from the platform lib,because i see some strange phenomenon in debugging .

main function:

int main()
{

my_PowerUpDomains();
my_configSerdes();

my_Init_SGMII(0);

BIOS_start ();

}

my_PowerUpDomains();
my_configSerdes();

my_Init_SGMII(0);

are the copies of the orginal function with a little modifies.

void my_configSerdes()
{
CSL_SGMII_STATUS sgmii_status;

/* Unlock the chip configuration registers to allow SGMII SERDES registers to
* be written */
CSL_BootCfgUnlockKicker();

/* Configure the SERDES */
/* Multiply to be 8 with Quarter Rate in the Rx registers */
CSL_BootCfgSetSGMIIConfigPLL (0x00000041);

platform_delaycycles(100);

//31:25 Reserved 0000000
//23:24 LOOPBACK 00
// 22 ENOC 1
//21:18 EQ 0001
//17:15 CDR 001 -- first order threshold of 17
//14:12 LOS 000 -- tie off
//11:10 ALIGN 01 -- Comma Aligned
//09:07 TERM 100 -- tie off (100)
// 06 INVPAIR 0
//05:04 RATE 01 -- tie off (10) //00 = Full Rate, 01 = Half Rate (*0.5), 10 = Quarter Rate (*0.25)
//03:01 BUSWIDTH 000 -- tie off
// 00 ENRX 1
// 0000 0000 0100 0100 0000 0010 0001 0001 = 0x0044_0211 -- My estimated value
// 0000 0000 0100 0100 0000 0100 0001 0001 = 0x0044_0411 -- New DV value
// 0000 0000 0000 1000 0000 1000 0100 0001 = 0x0008_0841 -- Original DV value

CSL_BootCfgSetSGMIIRxConfig (0, 0x00700621);
CSL_BootCfgSetSGMIIRxConfig (1, 0x00700621);

//31:22 Reserved 0
//21:20 LOOPBACK 00
//19:18 RDTCT 00 -- tie off
// 17 ENIDL 0 -- tie off
// 16 MYSNC 1 -- tie off
//15:12 DEMPHASIS ???? - 0001 Lets give some de-emphasis
//11:08 SWING ????
// 07 CM 1 -- tie off
// 06 INVPAIR 0
//05:04 RATE 01 -- tie off
//03:01 BUSWIDTH 000 -- tie off
// 00 ENTX 1
// 0000 0000 0011 0001 ???? ???? 1001 0001 = 0x0031_1E91 -- My estimated value
// 0000 0000 0000 0001 0000 1111 0001 0001 = 0x0001_0F11 -- New DV value
// 0000 0000 0100 0000 0001 1110 0100 0001 = 0x0040_1e41 -- Original DV value
CSL_BootCfgSetSGMIITxConfig (0, 0x000108A1);
CSL_BootCfgSetSGMIITxConfig (1, 0x000108A1);

/* Poll the SGMII0 lock bit to confirm that the sgmii module has recognized
that the SERDES PLL has locked */
do
{
CSL_SGMII_getStatus(0, &sgmii_status);
} while (sgmii_status.bIsLocked != 1);

/* Poll the SGMII1 lock bit to confirm that the sgmii module has recognized
that the SERDES PLL has locked */
do
{
CSL_SGMII_getStatus(1, &sgmii_status);
} while (sgmii_status.bIsLocked != 1);

/* All done with configuration. Return Now. */
return;
}

void my_Init_SGMII (uint32_t macPortNum)
{
CSL_SGMII_ADVABILITY sgmiiCfg;
CSL_SGMII_STATUS sgmiiStatus;

/* Reset the port before configuring it */
CSL_SGMII_doSoftReset (macPortNum);
while (CSL_SGMII_getSoftResetStatus (macPortNum) != 0);

if (macPortNum == 1) {
/* Hold the port in soft reset and set up
* the SGMII control register:
* (1) Disable Master Mode
* (2) Enable Auto-negotiation
*/
CSL_SGMII_startRxTxSoftReset (macPortNum);
CSL_SGMII_disableMasterMode (macPortNum);
CSL_SGMII_enableAutoNegotiation (macPortNum);

CSL_SGMII_enableLoopback(macPortNum);//loopback

CSL_SGMII_endRxTxSoftReset (macPortNum);

/* Setup the Advertised Ability register for this port:
* (1) Enable Full duplex mode
* (2) Enable Auto Negotiation
* (3) Enable the Link
*/

/*
while(1)

{
if(CSL_SGMII_isLoopbackModeEnabled(macPortNum))
{
break;
}

}
*/
sgmiiCfg.linkSpeed = CSL_SGMII_1000_MBPS;//CSL_SGMII_1000_MBPS;
sgmiiCfg.duplexMode = CSL_SGMII_FULL_DUPLEX;
CSL_SGMII_setAdvAbility (macPortNum, &sgmiiCfg);

do
{
CSL_SGMII_getStatus(macPortNum, &sgmiiStatus);
} while (sgmiiStatus.bIsLinkUp != 1);

/* Wait for SGMII Autonegotiation to complete without error */
do
{
CSL_SGMII_getStatus(macPortNum, &sgmiiStatus);
if (sgmiiStatus.bIsAutoNegError != 0)
return; /* This is an error condition */
} while (sgmiiStatus.bIsAutoNegComplete != 1);
}

if (macPortNum == 0) {
/* Hold the port in soft reset and set up
* the SGMII control register:
* (1) Disable Master Mode
* (2) Enable Auto-negotiation
*/
CSL_SGMII_startRxTxSoftReset (macPortNum);
CSL_SGMII_disableMasterMode (macPortNum);
CSL_SGMII_enableAutoNegotiation (macPortNum);

CSL_SGMII_enableLoopback(macPortNum);//loopback

CSL_SGMII_endRxTxSoftReset (macPortNum);

/* while(1)

{
if(CSL_SGMII_isLoopbackModeEnabled(macPortNum))
{
break;
}

}
*/
/* Setup the Advertised Ability register for this port:
* (1) Enable Full duplex mode
* (2) Enable Auto Negotiation
* (3) Enable the Link
*/
sgmiiCfg.linkSpeed = CSL_SGMII_100_MBPS;// CSL_SGMII_1000_MBPS;
sgmiiCfg.duplexMode = CSL_SGMII_FULL_DUPLEX;
sgmiiCfg.bLinkUp = 1;
CSL_SGMII_setAdvAbility (macPortNum, &sgmiiCfg);

do
{
CSL_SGMII_getStatus(macPortNum, &sgmiiStatus);
} while (sgmiiStatus.bIsLinkUp != 1);
}

/* All done with configuration. Return Now. */
return;
}

void my_PowerUpDomains (void)
{
/* PASS power domain is turned OFF by default. It needs to be turned on before doing any
* PASS device register access. This not required for the simulator. */

/* Set PASS Power domain to ON */
CSL_PSC_enablePowerDomain (CSL_PSC_PD_ALWAYSON);

/* Enable the clocks for PASS modules */
CSL_PSC_setModuleNextState (CSL_PSC_LPSC_EMIF4F, PSC_MODSTATE_ENABLE);
CSL_PSC_setModuleNextState (CSL_PSC_LPSC_EMIF25_SPI, PSC_MODSTATE_ENABLE);

/* Start the state transition */
CSL_PSC_startStateTransition (CSL_PSC_PD_ALWAYSON);

/* Wait until the state transition process is completed. */
while (!CSL_PSC_isStateTransitionDone (CSL_PSC_PD_ALWAYSON));


/* PASS power domain is turned OFF by default. It needs to be turned on before doing any
* PASS device register access. This not required for the simulator. */

/* Set PASS Power domain to ON */
CSL_PSC_enablePowerDomain (CSL_PSC_PD_PASS);

/* Enable the clocks for PASS modules */
CSL_PSC_setModuleNextState (CSL_PSC_LPSC_PKTPROC, PSC_MODSTATE_ENABLE);
CSL_PSC_setModuleNextState (CSL_PSC_LPSC_CPGMAC, PSC_MODSTATE_ENABLE);
CSL_PSC_setModuleNextState (CSL_PSC_LPSC_Crypto, PSC_MODSTATE_ENABLE);

/* Start the state transition */
CSL_PSC_startStateTransition (CSL_PSC_PD_PASS);

/* Wait until the state transition process is completed. */
while (!CSL_PSC_isStateTransitionDone (CSL_PSC_PD_PASS));
}



as you see, I've tried different situations:  with or without loopback, sgmii 0 or sgmii 1

I've some questions :

1.CSL_SGMII_enableLoopback(macPortNum);//loopback  

   is this function used right?

2. a very strange phenomenon, when I run this project directly on the evm(init_sgmii(1), no loopback), it will run 

  well and i can receive the right packet on the PC using wirshark. 

However ,when i set breakpoints  and  run the project step by step, I'll see the sgmii link up status  be 1 after reset,

but after the code 

   CSL_SGMII_getStatus(macPortNum, &sgmiiStatus);

 it will become 0 ,and  the link up will fail.

 How can that happen?

 the same thing happened during a loopback situation. That confused me!!!1

3.On my board ,I can get none of the link up on both sgmii ports.(loopback is ok, both based on the code defore and run directly) I know  on the evm ,sgmii 0 is connected to AMC, and you can not have a link up(right?) do anyone have some suggestion? 


4.I run the code step by step ,and see  auto neogotiation  complete flag is always 0, what's the details in this process? i can not find 

any further description in the Gbe datasheet.


These questions are confused,I really need someone to help me !

Thank you in advance!