Please check the source files in ISDK1.0.0.8.
\am335x_sysbios_ind_sdk_1.0.0.8\sdk\starterware\bootloader\src\bl_main.c
\am335x_sysbios_ind_sdk_1.0.0.8\sdk\starterware\bootloader\src\armv7a\am335x\bl_platform.c
Some unknown registers are found in the source code "bl_platform.c".
#define CMD0_SLAVE_FORCE_0 (DDR_PHY_CTRL_REGS + 0x20)
#define CMD0_SLAVE_DELAY_0 (DDR_PHY_CTRL_REGS + 0x24)
#define CMD1_SLAVE_FORCE_0 (DDR_PHY_CTRL_REGS + 0x54)
#define CMD1_SLAVE_DELAY_0 (DDR_PHY_CTRL_REGS + 0x58)
#define CMD2_SLAVE_FORCE_0 (DDR_PHY_CTRL_REGS + 0x88)
#define CMD2_SLAVE_DELAY_0 (DDR_PHY_CTRL_REGS + 0x8C)
#define DATA0_RD_DQS_SLAVE_RATIO_1 (DDR_PHY_CTRL_REGS + 0xCC)
#define DATA0_WR_DQS_SLAVE_RATIO_1 (DDR_PHY_CTRL_REGS + 0xE0)
#define DATA0_WRLVL_INIT_RATIO_1 (DDR_PHY_CTRL_REGS + 0xF4)
#define DATA0_GATELVL_INIT_RATIO_1 (DDR_PHY_CTRL_REGS + 0x100)
#define DATA0_FIFO_WE_SLAVE_RATIO_1 (DDR_PHY_CTRL_REGS + 0x10C)
#define DATA0_WR_DATA_SLAVE_RATIO_1 (DDR_PHY_CTRL_REGS + 0x124)
#define DATA1_RD_DQS_SLAVE_RATIO_1 (DDR_PHY_CTRL_REGS + 0x170)
#define DATA1_WR_DQS_SLAVE_RATIO_1 (DDR_PHY_CTRL_REGS + 0x184)
#define DATA1_WRLVL_INIT_RATIO_1 (DDR_PHY_CTRL_REGS + 0x198)
#define DATA1_GATELVL_INIT_RATIO_1 (DDR_PHY_CTRL_REGS + 0x1a4)
#define DATA1_FIFO_WE_SLAVE_RATIO_1 (DDR_PHY_CTRL_REGS + 0x1b0)
#define DATA1_WR_DATA_SLAVE_RATIO_1 (DDR_PHY_CTRL_REGS + 0x1c8)
The registers are used for the DDR2 PHY initialization "DDR2PhyInit()".
The registers are not described in TRM (SPRUH73H).
If the registers exist, how must the registers be taken care of?
Best regards,
Daisuke
