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Host PCI boot issue

Other Parts Discussed in Thread: TMS320C6455, TMS320C6678

Gentleman,

We are facing an issue and I would appreciate if you guys could shed some light on that!

The host fills the L2 memory from a boot table. I can verify that the L2 content is same after JTAG upload or our host PCI boot.

I am writing the branch address to 0x87FFFC and polling that address hoping to see zero in there, as per the linux host boot loader.

The problem is that this memory address is never set to 0 and it looks like the RBL does not branch out. Typically, the DSP seems to loop around 0x20B01290

If I attach to the target with CCS and changes PC register to the value I write @ 0x87FFFC and run, then I can see the software runs just fine.

What could cause RBL not to branch out? I gained some experience around TMS320C6455 at the time where one would need to enable host interrupt and send a host interrupt in order to get the DSP branch out. Am I right to assume on TMS320C6678 the only required bit to branch out is to write at the MAGIC BOOT ADDRESS location?

Anyone got the same issue?

Some extra information:

we do have a custom board (not a EVM6678 with PLL fix).

we do have PG 2.0 silicon on board.

Best Regards

  • Sorry for the confusion. in the EVM the PCie boot goes through the IBL which polls the boot magic address. But in the scenario where the IBL is not invoked and the ROM PCIe boot is executed, then the hos needs to provide a PCIe interrupt to wake the core up. You can use the MSI interrupt to wake up the core0 to boot.

     

    Thanks,

    Arun.

  • Thank for the pointer Arun! For the sake of completeness, I am adding extra information on how to achieve that:

    The MSI register to write to is located a PCI register base + 0x54 and a 0 should be written in there. (for a CC6678).