How to configure AIF2 for RE

Daisuke Maeda

Guru 20205 points

The topology of CPRI consists of one REC(Radio Equipment Control) and one or more RE(Radio Equipment).

Our customer wants to use AIF2 as RE. They can use AIF2 as REC, but cannot use it as RE.

How should they configure AIF2 for RE? Is there the configuration example?

Best regards,

Daisuke

over 12 years ago

0 Daisuke Maeda over 12 years ago

Guru 20205 points

How is AIF2 configured as the CPRI slave port? Is there the configuration example?

Best regards,

Daisuke

0 Daisuke Maeda over 12 years ago in reply to Daisuke Maeda

Guru 20205 points

I found the following source codes in BIOS-MCSDK.

\pdk_C6670_1_1_2_6\packages\ti\drv\aif2\test\cprirelay
\lterelay.c
\wcdmarelay.c

In the codes, when 1 is set to DSP_procId, does it show configuration for a master port? When 2 is set to DSP_procId, does it show configuration for a slave port?

Best regards,

Daisuke

0 Seb Tomas over 12 years ago in reply to Daisuke Maeda

TI__Intellectual 2975 points

Daisuke,

AIF2 can't be configured as a CPRi slave. When connecting 2 AIF2 or CPRi masters (as done in the CPRI relay code you looked at), the system needs to provided a common clock to both sides of the antenna link, and also issue a common initial frame synchronization pulse on RadSync/PhySync SoC pins.

Best Rgds/Seb.

0 Daisuke Maeda over 12 years ago in reply to Seb Tomas

Guru 20205 points

Hi Seb,

Thank you for your reply.

Best regards,

Daisuke

0 Daisuke Maeda over 12 years ago in reply to Seb Tomas

Guru 20205 points

Hi Seb,

Where is it described that AIF2 does not work as a CPRi slave?
Does the User's Guide describe it?

Best regards,

Daisuke

0 Seb Tomas over 12 years ago in reply to Daisuke Maeda

TI__Intellectual 2975 points

Daisuke,

Please check http://www.ti.com/lit/an/sprabi2b/sprabi2b.pdf and the section on AIF2. While the clock recovery feature can support a certain level of jitter (check clock recovery algorithms chapter in AIF2 UG) , it can't support drift.

Best Rgds/Seb.

0 Daisuke Maeda over 12 years ago in reply to Seb Tomas

Guru 20205 points

Hi Seb,

Thank you for your reply.

I'm ashamed to say that I don't understand the CPRI specifications.

For the CPRI slave specification, when the SerDes reference clock and the frame sync clock are generated from the different clock source, the clock recovery feature must support a certain level of jitter and must support drift.
Therefore, AIF2 can not support the CPRI slave.

Is my understanding correct?

Best regards,

Daisuke

0 Seb Tomas over 12 years ago in reply to Daisuke Maeda

TI__Intellectual 2975 points

Daisuke,

Cpri spec mentions: " Any RE shall receive on its slave port a clock traceable to the main REC clock. This requires any RE reuses on its master ports a transmit clock traceable to REC,i.e. a clock retrieved from one of its slave ports."

AIF2 does not have this logic in place. It would require outputting the recovered clock to a cleaner logic and then inputting the cleaned clock into AIF2.

Best Rgds/Seb.

0 Daisuke Maeda over 12 years ago in reply to Seb Tomas

Guru 20205 points

Hi Seb,

Thank you for your reply.

Best regards,

Daisuke

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How to configure AIF2 for RE