c6678 IPC .text in MSMCSRAM

Hi Ilya,

Did your app work before you tried to place .text into MSMCSRAM?

Looking at the map file:

MSMCSRAM              0c000000   00400000  000a3960  0035c6a0  RW X

Then, in your *.cfg file:

Program.global.shmSL2Base = 0x0C000000;
Program.global.shmSL2Size = 0x80000;

Startup.firstFxns.$add('&set_local_id');

SharedRegion.translate=false;
SharedRegion.setEntryMeta(0,{base: Program.global.shmSL2Base,
                             len: Program.global.shmSL2Size,
                             ownerProcId:0,
                             isValid: true,
                             cacheEnable:true,
                             cacheLineSize:64,
                             name: "ipc_internal_shm",
                             });

This is setting MSMCSRAM to be shared memory, which you then are placing .text into.

My guess is that your .text is being overwritten by the other core because it's located in the shared region.

Steve

Hello, Steve

yes, the app worked befor it. But how should I configure space for placing .text?

By the way the .text section doesn't include in SharedRegion 0.

There is a .text map:

  0c080000    0c080000    00023960   00023960    r-x .text
As you can see the .text section started from 0x0c080000 but SharedRegion 0 has length 0x80000 and started from 0x0c000000.

Thank you for reply. Ilya.

Hi Ilya,

I will need to ask a colleague of mine who is better familiar with IPC.  In the meantime, I found the following related thread that may be useful to you. 

Steve

http://e2e.ti.com/support/embedded/bios/f/355/t/165155.aspx

Steve,

ok, I'll wait. I read this thread, actually it's not for my case. But otherwise thank you. I think it maybe section overlap. Should I put the .text section on each core to a different sections?

I found the following link http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/136585.aspx . There is a problem is very similar to mine. There is a breakpoint corruption issue. But I can't place .text it L2SRAM so far I have a big .text section.

Steve, could you to explain me why it happens when I use SW breakpoint? It seems to me that the SW-breakpoint makes corrupted .text section. But it important for me why so?

Ilya,

I couldn't duplicate the behavior you mentioned.  I run your code and was able to set breakpoints without crushing the system when .text was put in MSMC.

What versions of IPC, SYS/BIOS, and CGT are you using?

Xiaohui

Ilya,

I also tried loading and running your app on a 6678L evm.  I loaded and ran the executable on core0 and then core1.  I see the following output:

core 0:

enter main()
enter taskFxn()
exit taskFxn()

core 1:

enter main()
enter taskFxn()
exit taskFxn()

I think I'm not seeing the issue ... is that correct?

I was also able to set break points without problems.  For more on your break point inquiries, please have a look at the following wiki:

http://processors.wiki.ti.com/index.php/How_Do_Breakpoints_Work

Steve

Hi, All

thank you for your response. Could you set breakpoint to "errno=notify_register(MultiProc_getId("CORE1"),notify_callback,0x1010);" line. When I load the program to core0 and core1 after that I run these and could see that the program stopped in this line in both cases but it is not corrected. There is an only one enter should be. After the call this by core1 it will be fail.

Please, try to set breakpoint to this line and check it. Is it correct behaviour?

There is a versions of libraries:

IPC: ipc_1_24_03_32

Compiler: 7.4.2

SYS/BIOS: 6.35.1.29

How to reproduce it:

1. group Core0 and Core1 in group0
2. connect target
3. load gel file evmc6678.gel
4. run Script->Global_Default_Settings
5. select group0
6. load ipc_tst.out
7. set breakpoint to line 26 and 27 line
8. run core0
9. run core1
10. /*debugger stopped on 26 line in both cores*/
11. run core0
12. /*debugger stopped on 27 line in core0*/
13. run core0
14. run core1
15. /*debugger stopped on 27 line in core1*/ !!!! WRONG
16. run core1
17. core1 aborted

Another more simple way:

1. select core0 and core1
2. connect target
3. load gel file evmc6678.gel
4. run Script->EVMC6678L Init Functions ->Global_Default_Settings
5. select core1
6. set breakpoint to 26 and 27 lines
7. run core1
8. run core0
9. /*debugger stopped on 26 line on both cores*/
10. run core0
11. /*debugger stopped on 27 line*/
12. run core0
13. core0 aborted

OS: Windows 7

CCS: Version: 5.4.0.00091

Libs:
bios_6_35_01_29
ipc_1_24_03_32
uia_1_03_00_02
xdctools_3_25_00_48
c6000_7.4.2

Yes the code without breakpoint execute successful. I set up software breakpoint and it broken up an execution flow.

Thank you for response.

Glad it works.  I ran across some information on Multi-core debugging in CCS that you might find useful.

http://processors.wiki.ti.com/index.php/Multi-Core_Debug_with_CCSv5

If you have any issues with the CCS debugger, it might be good to post your question in the CCS forum.