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Hello,
Michael Questo said:1) Could I decode five streams of 1080p30 and encode one stream of 1080p30? (Could not find any explicit statement anywhere)
DM8168 has 3xHDVICP modules. Each module is scalable in terms of resolutions and channels supported, so for example one HDVICP2 module could support 1x 1080p60 or 2x 1080p30 or 4x 720p30 or 10x SD h.264 encodes/decodes.(check TRM: HD Video Coprocessor Subsystem).
Michael Questo said:2) Does the HDVICP2 support both Encode and Decode of JPEG?
In EZSDK there is MJPEG decoder.
Michael Questo said:Is the HVICP2 capable of encoding / decoding 2560x1600p30?
You could check in: /ti-ezsdk_dm816x-evm_5_05_02_00/component-sources/omx_05_02_00_48/src/ti/omx/docs for supported Services and Features of the codecs. But keep in mind that from codec prospective, some of codecs could supports resolution upto 4kx4k but the HDVPSS can handle maximum of 1920x1080 Maximum pixel clock support for capture and display is up to 165MHz.
Michael Questo said:Will it be needing the data specifically in 4:2:0 format?
Encoders/decoders uses only 4:2:0 (NV12).
Best Regards,
Margarita
Margarita thanks for the reply! We would like some additional clarifications.
1) Could I decode five streams of 1080p30 and encode one stream of 1080p30?
- So Yes five streams of 1080p30 and encode one stream of 1080p30 is possible. Correct?
2) Does the HDVICP2 support both Encode and Decode of JPEG? (Wiki indicates decode only)
- In the TMS320DM816x technical Reference manual on page 133: 1.4.1 HDVICP2 Overview: “JPEG (also MJPEG) Baseline Encode/Decode” which means I have a conflict between two sources of TI documentation. Is encode possible also?
3) Is the HDVICP2 capable of encoding / decoding 2560x1600p30? (Wiki indicates limit of 2048x2048, not explicit)
- H.264 is the desired encoding. We intend to move the data over PCIe, so we are not concerned about HDVPSS limitation. From a purely transcoding perspective we were wondering if it is possible encode 2560x1600p30 or if the HDVICP is HW/SW limited. Is it capable of this?
4) What video format could we stream over PCIe that the encoders will be capable of encoding.
- To clarify, format of data is a multilayer concept. We will be writing the video data directly into the DM8167 DDR3 memory. How does it expect to see the data? Format / resolution / color space… there are lots of different possible ways for each of these to be represented and lots of different possible ways for a frame to be stored in memory.
4b) Is the output format of the video frame (in the DDR3 memory) for the decoder the same as the input format of the video frame for the encoder?’ Please note, we currently have no plans to use the HDVPSS.
An interesting post Mike. I'm keen to hear the replies.
How will you get your video data "directly" into DDR3 memory?
Hi,
I was able to integrate the JPEG codec and get the Jpeg encoder working on the IVAHD subsystem (M3) through openMax. You can check:
http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/p/218538/983344.aspx#983344
-DavidSoto