ECAP period register setup

Boris,

The CAP1 and CAP2 registers become the active period and compare registers respectively,
The CAP3 and CAP4 registers become the period and capture shadow registers respectively.

For APWM mode:
Writing any value to CAP1/CAP2 active registers also writes the same value to the
corresponding shadow registers CAP3/CAP4. This emulates immediate mode.
Writing to the shadow registers CAP3/CAP4 invokes the shadow mode.

In APWM mode:
CAP1 and CAP2 registers become the active period and compare registers, respectively.
CAP3 and CAP4 registers become the respective shadow registers (APRD and ACMP) for CAP1 and
CAP2 during APWM operation.

When CAP1/2 registers are not used in capture mode, their contents can be used as Period and
Compare values in APWM mode.

Some more details from eCAP module chapter,
The behavior of APWM active-high mode (APWMPOL == 0) is:
CMP = 0x00000000, output low for duration of period (0% duty)
CMP = 0x00000001, output high 1 cycle
CMP = 0x00000002, output high 2 cycles
CMP = PERIOD, output high except for 1 cycle (<100% duty)
CMP = PERIOD+1, output high for complete period (100% duty)
CMP > PERIOD+1, output high for complete period

The behavior of APWM active-low mode (APWMPOL == 1) is:
CMP = 0x00000000, output high for duration of period (0% duty)
CMP = 0x00000001, output low 1 cycle
CMP = 0x00000002, output low 2 cycles
CMP = PERIOD, output low except for 1 cycle (<100% duty)
CMP = PERIOD+1, output low for complete period (100% duty)
CMP > PERIOD+1, output low for complete period

Hello Rubesh.

Thank you for your respond.

I read many times the data which you brought from the OMAP-L138 UG (eCAP chapter).

My question was very simple - the UG does not say - the ECAP1 resister (PRD) must be set to the value ("period"-1). Are you agreed?

The tables on page  418,420,423 show the value in CAP1 register (PRD) set exactly in the "period" value. Are you agreed?

That all information in UG (SPRUN77A) is confusing for the designers.

It must be written very clear in UG - the period value for eCAP in APWM mode must be set in the register eCAPx_CAP1 to the value ("period"-1).

Are you agreed with that?

Thank you for your help,

Boris Ruvinsky 

Boris,

I understand your difficulties to check the PRD in OMAPL138 TRM.
Kindly refer the Section 16.3.5.1 in OMAPL138 TRM.

Table 16-5. ECAP Initialization for APWM Mode.
Register       Bit             Value
CAP1          CAP1         0x1000

Similarly you can get the value in Table 16-6 to Table 16-12 with examples.

And also refer the CAP1( Capture 1) Register in Section 16.4.3.
It is a read/write(R/W) register.
Field          Description
CAP1        APRD active register when used in APWM mode

You also know CTR=PRD.
If you see in eCAP driver code,
periodVal - It is the Period value to be configured.

Hello Pubesh.

Thank you for your respond.

It sound like - my question is not clear for you.

I looked trough eCAP section many times before I made my post on E2E and found it confusing.

I am very familiar with all details of the eCAP section in UG and with all tables which you refer to.

From your respond:

"Kindly refer the Section 16.3.5.1 in OMAPL138 TRM.

Table 16-5. ECAP Initialization for APWM Mode.
Register       Bit             Value
CAP1          CAP1         0x1000"

That is incorrect because CAP1 register value must be (0x1000-1).

The same incorrect CAP1 value is in all other tables (16-6 to 16-12).

The CAP1 register value must be ("period"-1) and that must be clear written in UG to avoid the confusion.

I tested that on the real board with real OMAP-L138.

I made my post to confirm my understanding of CAP1 register setting.

I also wanted to bring TI attention to the UG (SPRUH77A) eCAP section which definitely requires correction.

Thank you for your help,

Boris Ruvinsky

Boris,

Only the period value is assigned to CAP1 register in APWM mode.
Look the ecap driver code in OMAPL138 Starterware, as mentioned the below path
OMAPL138_StarterWare_1_10_03_03\drivers\ecap.c

void ECAPAPWMCaptureConfig(unsigned int baseAdd, unsigned int compareVal,
                           unsigned int periodVal)
{
    HWREG(baseAdd + ECAP_CAP1) = periodVal;
    HWREG(baseAdd + ECAP_CAP2) = compareVal;
}

You can verify the period value only is assigned to CAP1 in OMAPL138 TRM as well as driver code.
If you are not agree, share your test code which is provided by TI and test board details.

Rubesh,

What is the value of "periodVal"?

How is "periodVal" defined?

I found that "periodVal" must be = "period-1".

That means that for the period = 0x1000 the CAP1=0x0FFF (must be).

I have my own design based on OMAP-L138 and I tested the ECAP1 very accurately. 

Are you agreed?

Can you please double check with TI factory team?

Can you also try this on the real PCB with OMAP-L138?

Thank you,

Boris Ruvinsky

Boris,

periodVal
It is the Period value to be configured.
I have shared the eCAP driver code from OMAPL138 Starterware.
Where you get the eCAP source code for OMAPL138?
TI has provided enough details for eCAP1 period value set via eCAP1 register.

Hello Rubesh,

Thank you for your respond.

I wrote the code (GEL file) for ECAP myself (it is very easy) - I did not use any TI source code for ECAP.

1.  If periodVal is exactly ECAP "period" - how can you explain the following information from UG, page407? Please review the highlighted:

"The behavior of APWM active-high mode (APWMPOL == 0) is:

CMP = 0x00000000, output low for duration of period (0% duty)

CMP = 0x00000001, output high 1 cycle

CMP = 0x00000002, output high 2 cycles

CMP = PERIOD, output high except for 1 cycle (<100% duty)

CMP = PERIOD+1, output high for complete period (100% duty)

CMP > PERIOD+1, output high for complete period"

2.  If you set periodVal (CAP1=0x1) and CMP (CAP2=0x1) - you will get the ("ECAP_period" = 2) and  ("ECAP_compare" = 1).

3.  I did try it on the real PCB with OMAP-L138 on it and I got "ECAP_period"=2/"ECAP_compare"=1. 

4.  I also tried CAP1=0xB and CAP2=0x6 and got  "ECAP_period"=12/"ECAP_compare"=6 (decimal values).

5.  You can also try this on the TI evaluation board (if it is available for you) - that would be the best way to convince you.

6.  Can you please double check all that with TI OMAP-L138 experts?

7.  That must be very clear written in OMAP-L138 UG to avoid the design errors. The difference in just one SYSCLK2 clock (ECAP module clock)  in the "ECAP_period" is not easy to find when the period is a big value.

Thank you for your help,

Boris Ruvinsky

Boris,

Thanks for your details.
I have shared with you, whatever I known about the ECAP Period Register.
You will get some more detailed support from someone better able to help.

Hello Pubesh,

Thank you for your respond and help.

Can I ask you if you forwarded this request to somebody from TI - who will be able to get more information on ECAP behavior?

Thank you,

Boris Ruvinsky

Boris,

I will do it as per your request.
Some more details for ecap, see the below wiki page.
http://processors.wiki.ti.com/index.php/OMAP-L1_Linux_Drivers_Usage#eCAP

Pubesh,

Are there any updates with here?

-Nic

Nic,

I have replied this query with the details of ECAP period value on OMAPL138.
I need someone support in validating the same. Please provide your suggestions if any.

Nic,

As I understood - you can continue with this post.

I found that ECAP CAP1 register (period) must be set to the value (period-1) for the correct ECAP period. The OMAP-L138 documentation does not have this information.

As you can see in this post - Pubesh could not confirm - what I found (CAP1 = (period-1)).

Can you please double check this and confirm?

Thank you for your help,

Boris Ruvinsky

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