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AM1808 SPI signals

Other Parts Discussed in Thread: AM1808, DA8XX
Hello everyone,
I'm using SBC8018 board (based on AM1808) and I have enabled SPI1 port (SPI1_CLK, SPI1_SOMI, SPI1_SIMO, SPI1_SCS) on J42 extension board. I have muxed this signals as follows (in da850.c file):
MUX_CFG(DA850, SPI1_CS_0,  5,  4,   15, 1, false)
MUX_CFG(DA850, SPI1_CLK,   5,  8,   15, 1, false)
MUX_CFG(DA850, SPI1_SOMI, 5,  16, 15, 1, false)
MUX_CFG(DA850, SPI1_SIMO, 5,  20, 15, 1, false)

I have added this in board-da850-evm.c file:
static struct spi_board_info da850_spi_board_info[] =
{
      [0] = {
           .modalias = "spidev",
          .mode = SPI_MODE_1,
          .max_speed_hz = 1000000,
          .bus_num = 1,
          .chip_select = 0,
     },
     [1] = {
          .modalias = "spidev",
          .mode = SPI_MODE_1,
          .max_speed_hz = 1000000,
          .bus_num = 0,
          .chip_select = 0,
     },
};
and also:
ret = da8xx_pinmux_setup(da850_spi1_pins);
if (ret)
{
      pr_warning("da850_evm_init: spi1 mux setup failed: %d\n", ret);
}
da850_init_spi1(BIT(1), da850_spi_board_info, ARRAY_SIZE(da850_spi_board_info));
spi_register_board_info(da850_spi_board_info, ARRAY_SIZE(da850_spi_board_info));

I have declared these lines in mux.h file:
enum davinci_da850_index {
      .......
      DA850_SPI1_CS_0,
      DA850_SPI1_CLK,
      DA850_SPI1_SOMI,
      DA850_SPI1_SIMO,
      .......
}


As far as I know, when SPI signal are in idle state only SPI_CS must be high while others (SPI_MISO, SPI_MOSI and SPI_CLK) must be in low state. This is not true in my case because all signals are on high levels (3.3V). Is this my fault? If yes, where I'm wrong? Can I somehow to handle SPI signals or this is job for driver?

Thanks for help,
Vladimir
  • Thanks for the post.  

    Could you please share the Kernel PSP version that you are modifying? 

    Vladimir: said:
    As far as I know, when SPI signal are in idle state only SPI_CS must be high while others (SPI_MISO, SPI_MOSI and SPI_CLK) must be in low state. 

    The SPI_MISO, SPI_MOSI and SPI_CLK states are depends on Clock polarity and phase and the hardware schematic design. 

    All your kernel configuration looks OK.

    Please let us know if you have any problem in accessing the SPI device using driver.

  • Rajasekaran thanks for answer...


    - I'm using "linux-03.20.00.14" (provided with the SBC8018 board). Maybe these signals are internal pulled up and that's OK. I don't know, I just wanted to see if it's a mistake. In my previous post I wrote ".mode = SPI_MODE_1" and with that line I set clock polarity and phase.

    - No, I don't have any problem with accessing SPI device using driver. I just noticed that these signals are on high level and that confused me. Possibly it is the effect of my misunderstanding of SPI communication.


    Best regards,

    Vladimir

  • Vladmir,

    I just want to understand will you able to make communication with slave device successfully hope you are.  

    You are saying the signal is at high level then its showing 3.3V or in the mid-range 1.5V Tri-stated?

    Have you probed the clock and data signal while the transaction is happening to make sure the lines are toggling?

    Probably once the transaction is completed these pins may go to tri-state or in order to avoid these pins floating it may be Internally Pulled high.

     Check the Pull-up/Pull-down Select Register and device specific data manual to see the Internal Pull-up is enabled for these signals.

    Regards

    Antony

  • Antony,
    
    
    I succeeded to make communication with slave device. I think that these signals levels are unimportant as long as I am receiving good data from the slave device. When I said "high level" I meant 3.3V. Yes, I probed the (all) signals during the communication and everything looks fine. I think that pins are internally pulled up.
    
    
    I hope that I helped you with this answer.
    
    
    
    
    Best regards,
    Vladimir
  • Vladimir,

    Please review the schematics got along with SBC8018 package for default pin states (Pull up resistors).

    Thanks.