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AM335x DCAN TXRQ X register - clarification

Vasili Galka
Expert 2690 points

Hi,

From the description of "TXRQ X" register in the TRM:
"Bit 0 of the transmission request X register represents byte 0 of the transmission request 1 register. If one or more bits in this byte are set, bit 0 of the transmission request X register will be set.".

I suppose bits 2, 4, 6, ... are for transmission request 2, 3, 4, ... registers and so on...

However, it is not specified what is the meaning of bits 1, 3, 5, ... in the "TXRQ X" register.

Best,
Vasili

  • 0
    TI__Guru* 85990 points

    Vasili, here is some more explanation:

    Bit 0 of TXRQ_X represents byte 0 of TXRQ12 (bits 0-7)

    Bit 1 of TXRQ_X represents byte 1 of TXRQ12 (bits 8-15)

    Bit 2 of TXRQ_X represents byte 2 of TXRQ12 (bits 16-23)

    Bit 3 of TXRQ_X represents byte 3 of TXRQ12 (bits 24-31)

    Apply the same pattern to the other bits of TXRQ_X to TXRQ34, TXRQ56, and TXRQ78

    Regards,

    James