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[AM335x] CMD_STAT register of CM3

Paul D
Intellectual 335 points
Other Parts Discussed in Thread: AM3359

Hi,

I am trying to use the Deep Sleep mode of my AM3359 (ICE board).

The thing is, in the SDK, I can found that code:

/**
 * \file     cm3wkup_proxy.h
 */
/******************** COMMAND STATUS *********************/

/* In init phase this denotes that CM3 was initialized successfully.
When other commands are to be executed, this indicates completion of command */
#define PM_CMD_PASS            (0x0)

/* Early indication of command being carried out */
#define PM_IN_PROGRESS        (0x3)

/* In init phase 0x2 denotes CM3 could not initialize properly.
When other tasks are to be done, this indicates some error in carrying out the task. */
#define PM_CMD_FAIL            (0x1)

/* CM3 INTC will catch the next WFI of A8 and continue with the pre-defined sequence */
#define PM_WAIT4OK            (0x2)

And:

/**
 * \file     cm3wkup_proxy.c
 */
#define PM_STATUS_SHIFT            16
unsigned short readCmdStatus(void)
{
    return ((HWREG(SOC_CONTROL_REGS + CONTROL_IPC_MSG_REG(1))) >> PM_STATUS_SHIFT);
}

But in the TRM, page 516, Table 8-15. CMD_STAT Field, every value is incremented by one.

Can you clear this out for me please?

Thanks,
Paul

  • 0
    TI__Mastermind 44306 points

    Paul,

    if you talk about IA-SDK that is most likely code inherited from Starterware. We never tested any sleep modes on ICE as the industrial apps we target are usually line powered and 24h on. If you are looking for fully supported low-power features with AM335x please use another board and related software and SDKs.

    You are free to trial anything with ICE board but I fear the support from our side will be very limited in this case...

    Regards.

  • 0 in reply to Frank Walzer
    Intellectual 335 points

    I will try on a beaglebone white A6 then.

    But still, it annoys me, because the code I gave before should work the same way since it's about a AM335x. It basically read the IPC_MSG_REG1 and shift 16 times its content. Therefor we should find the same possible value in CMD_STAT... Maybe the previous code hasn't be updated?

    Cheers,
    Paul

  • 0 in reply to Paul D
    Intellectual 335 points

    Hi,

    I wanted to clear this out so I downloaded the sources for Cortex-M3 here (found here).

    We can found in the file named /am33x-cm3/src/include/system_am335.h those few #define:
    #define CMD_STAT_PASS        0x0
    #define CMD_STAT_FAIL        0x1
    #define CMD_STAT_WAIT4OK     0x2

    The Cortex-A8 is gonna be notified through the void a8_notify(int cmd_stat_value) function in /am33x-cm3/src/sys_exec/sync.c

    For me, the TRM and the CM3 binary files doesn't match, and information in the TRM is wrong. Could you please take a look on this. It's not about ICE board, it's about the TI AM3359 chip.

    Thanks,
    Paul