DM8168 platform OCP CLK is 400MHz. Cortex A8 CPU CLK is 1GHz
How many cycles will it take to read or write one 32bit word from L3 or L4 space (uncache unbuffer)?
I donot know the efficiency of the interconnect bus.
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DM8168 platform OCP CLK is 400MHz. Cortex A8 CPU CLK is 1GHz
How many cycles will it take to read or write one 32bit word from L3 or L4 space (uncache unbuffer)?
I donot know the efficiency of the interconnect bus.