OMAP-L138: ARM Local Reset

Hello,

I've some problems with the ARM Local Reset via the PSC.

The following versions are used for the OMAP-L138 ARM development:
- CCS Version 5.2.1.00018
- SYS/BIOS 6.30.03.46 (eabi) ELF
- TMS470 Code Generation Tools 4.9.6
- XDCTOOLS 3.23.03.53

The problem could be reproduced on a LOGIC PD L138 eXperimenter board as well on a custom board.

Problem description:
During some reset scenario the ARM will set itself into reset to be relased afterwards by the DSP out of reset.
The code on ARM side which brings the ARM into an unrecoverable state is: PSC0_MDCTL14 &= ~0x00000100;
with
#define PSC0_ADDR ( ( volatile unsigned int * )0x01C10000 )
#define PSC0_MDCTL14 ( *( PSC0_ADDR + 0xA38 / 4 ) )

Some experiment with the emulator:
The ARM crahes and can not be accessed afterwards when the STR instruction is executed (R0 contains 0x01C10128; R12 contains 0x00000003)
c006c6cc:   E590C910 LDR           R12, [R0, #0x910]
c006c6d0:   E3CCCC01 BIC           R12, R12, #0x100
c006c6d4:   E580C910 STR           R12, [R0, #0x910]

When halting the ARM just before the STR is executed and the the write of 0x00000003 to addr. 0x01C10A38 is done via the memory browser
the ARM can be properly set into reset (independent if this is done through ARM or DSP memory browser).
Additionally it can be brought out of reset via the DSP memory browser by writing 0x00000103 to addr. 0x01C10A38

The overall question is: Is it allowed on the OMAP-L138 that one core sets itself into reset via clearing the LRST bit in the module control register (MDCTLn)?

Are there any know problems when one core resets itself?

Thanks,
Frank

Frank said:

The overall question is: Is it allowed on the OMAP-L138 that one core sets itself into reset via clearing the LRST bit in the module control register (MDCTLn)? Are there any know problems when one core resets itself? Thanks, Frank

The intended use-model is not to have the core reset itself ,this is not it is tested either. The intended use model is to have ARM reset the DSP or  vice versa. The most typical scenario you have is ARM keeping/releasing DSP from reset. More so given that ARM is generally the master in the system as well as the boot master.