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about simplified Power management for DM814x

Other Parts Discussed in Thread: TMS320DM8148

Hi,every one:

We are planning to use TMS320DM8148 in a power system measure instrument.

The instrument not use video encode/decode, but use display / network and C674x core as data process unit, use SATA as data record media, PCI-E as high speed data acquire interface,

 It also not use SmartReflex functions,  so we require a more simplified DM8148 system,  first we want to combine same voltage power into one power supply

I search the E2E community, there has similar requirment, it tells me to ask local FAE, under NDA to acquire the document "Power management for DM814x".

then I asked the local FAE, give the related E2E post link address to them, latest they tell me there has no that document.

   I want to know how I can reslove the above problem, is there anybody give me a more detailed advice on DM8148 power design. thanks.

     

 

  • Hi Ting,

    I am not aware of any "Power management for DM814x" document that is under NDA. You can start with the following documents/wiki pages regarding the DM814x device power management:

    1. DM814x TRM, chapter 2 Power, Reset, and Clock Management (PRCM) Module

    2. DM814x datasheet, chapter 7 Power, Reset, Clocking, and Interrupts

    3. DM814x Silicon Errata, Advisory 3.0.80, Advisory 3.0.81, Advisory 3.0.82

    4. http://processors.wiki.ti.com/index.php/DM814x_AM387x_Power_Estimation

    5. http://processors.wiki.ti.com/index.php/DM814x_Hardware_Design_Guide

    6. http://processors.wiki.ti.com/index.php/Startup_shutdown_and_power_management

    7. http://processors.wiki.ti.com/index.php/DM814x_AM387x_PM_Suspend_resume_overview

    8. http://processors.wiki.ti.com/index.php/TI81XX_PSP_PM_AVS_Driver_User_Guide

    9. http://processors.wiki.ti.com/index.php/TI81XX_PSP_AVS_FAQ

    10. http://processors.wiki.ti.com/index.php/TI81XX_PSP_User_Guide#Power_Management

    BR,

    Pavel



  • Thanks for your answer. Pavel

          now I am design the power supply without AVS / DVFS function, according to DM8148 datasheet  6.2  under OPP100, that seems simple : only 1.1V / 1.8V / DVDD_DDR(1,5V)/ 3.3V required,and the current consume is reference to DM8148 power   estimation document.

         ther still one thing is confused me. accord to M1848 Silicon Errata, Advisory 3.0.81 adivice power up 3.3 after 1.8V and Advisory 3.0.82 adivice power up DVDD_DDR(1,5V) before 3.3V, so power up sequence  should be changed to following sequence : 1.8V -> DVDD_DDR(1,5V) -> DVDD_3.3V -> CVDD_1.1V. is this correct ?

       I also study the TPS659113 EEPROM power up sequence( that DM8148 EVM used mode ) is 1.8V -> DVDD_3.3V -> DVDD_DDR(1,5V)  -> CVDD_1.1V. which is correct? 

       There may be I mis-understand the  Silicon Errata or TPS659113 function, can you help me to clearly this problem? thanks.

                                                   tingLi

     
  • Ting,

    ting li said:
    ther still one thing is confused me. accord to M1848 Silicon Errata, Advisory 3.0.81 adivice power up 3.3 after 1.8V and Advisory 3.0.82 adivice power up DVDD_DDR(1,5V) before 3.3V, so power up sequence  should be changed to following sequence : 1.8V -> DVDD_DDR(1,5V) -> DVDD_3.3V -> CVDD_1.1V. is this correct ?

    I think this is correct.

    ting li said:
    I also study the TPS659113 EEPROM power up sequence( that DM8148 EVM used mode ) is 1.8V -> DVDD_3.3V -> DVDD_DDR(1,5V)  -> CVDD_1.1V. which is correct?

    I think the Silicon Errata 3.x is the most up-to-date document, so Silicon Errata should be with the highest priority.

    BR
    Pavel

  • thanks, Pavel Botev

    now I try to make the power up sequence 1.8V -> DVDD_DDR(1,5V) -> DVDD_3.3V -> CVDD_1.1V

    each voltage enable / disable separately, one voltage stable and then enable next .

    for power down sequence still be  CVDD_1.1V -> DVDD_DDR(1,5V) -> DVDD_3.3V -> 1.8V ?

    Is there any other reference document for power up / down sequence problem ?

     

     

  • Ting,

    ting li said:
    the power up sequence 1.8V -> DVDD_DDR(1,5V) -> DVDD_3.3V -> CVDD_1.1V

    Reading again Advisory 3.0.80 Power Sequencing: CVDD versus CVDD_*, I think the sequence should be:

    1.8V -> DVDD_DDR(1,5V) -> DVDD_3.3V -> CVDD -> CVDD_x

    ting li said:
    for power down sequence still be  CVDD_1.1V -> DVDD_DDR(1,5V) -> DVDD_3.3V -> 1.8V ?

    I think power down should be:

    CVDD_x -> CVDD -> DVDD_DDR(1,5V) -> DVDD_3.3V -> 1.8V

    ting li said:
    Is there any other reference document for power up / down sequence problem ?

    You can find some info in the DM814x TRM, sections 2.8.4 Power Domain Power-Down Sequence and 2.8.5 Power Domain Power-Up Sequence

    BR
    Pavel