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MCBSP1 receive with external clock problem DM3730

Eswar
Intellectual 420 points

Hi,

    We have a requirement to receive 1504 bits from transmitter to receiver (2 different board with mcbsp1 interface) with clock and data only. We are able to transfer and receive the data using FSRand CLK  as an external inputs to receiver.  Is there a way to receive with out FSR.

Can we receive data in McBSP with out Frame sync? If so can the configuration be provided.

We have tried

      On Receiver:

               1: Connecting FSX to FSR in receiver, connecting CLKX,CLKR to external clock and generated FSX internally using dummy write. This is not working. We are not seeing FSX being generated correctly.

we configured as below

    mcbsp_config.xcr1 |= XWDLEN1(OMAP_MCBSP_WORD_32);
    mcbsp_config.xcr1 |= XFRLEN1(frm_len);
    mcbsp_config.xcr2 |= XDATDLY(dly);
    mcbsp_config.pcr0 |= FSXM;
   mcbsp_config.pcr0 |= SCLKME;
    mcbsp_config.spcr2 |=GRST;
    mcbsp_config.spcr2 |=FRST;
    mcbsp_config.xccr |= XDMAEN; // Enable DMA transmitt requests
    mcbsp_config.xcerc = 0x1;
    mcbsp_config.srgr2 |= CLKSM;

    mcbsp_config.spcr1 &= ~ RRST;       // reset state
    mcbsp_config.rcr1 |= RWDLEN1(OMAP_MCBSP_WORD_32);
    mcbsp_config.rcr1 |= RFRLEN1(frm_len);
    mcbsp_config.rcr2 |= RDATDLY(dly);
    mcbsp_config.rccr |= RDMAEN; // Enable DMA receive requests
    mcbsp_config.rcerc = 0x1;
    mcbsp_config.spcr1 |= RRST;         // out of reset                               

Thank You

Eswar

  • 0
    TI__Guru 65405 points

    Hi Eswar,

    As you are using McBSP1 you need to use the FSR. You can read more detailed description in the TRM section - 21.2.2 McBSP Signals Descriptions. Pay attention on the test in grey background:

    External pins mcbsp1_clkr and mcbsp1_fsr are connected to pads only for McBSP1 module; other McBSP modules don’t have these connections. For these modules, CLKR and FSR signals sources are mcbspi_clkx and mcbspi_fsx pins, respectively. Consequently, there is a light restriction on other McBSP modules when used in full-duplex mode. Reception and transmission use the same clock signal and the same frame synchronization signal.

    BR

    Tsvetolin Shulev