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About UPP of OMAPL138

shaotu zhu
Prodigy 120 points
Other Parts Discussed in Thread: OMAPL138

Hi:

      

      As picture described ,each UPPperipheral I/Ochannel has a 512 byte FIFO,When in transmit mode ,Transimssion will not begin until the channel has loaded enough data to fill at least one full FIFO,But when received,not give described.My question is :

      (1):Does it means when i set the RDSIZEI to 0x03 in UPTCR register,it will read data out only when 256 byte had loaded into the receive FIFO?

     (2):Does it means the number when i send or received must  be  integer multiples of 64 byte?

     Another question is I used EDMA to read or write data with  NAND, also i used UPP to read data from FPGA,the speed is 25MHz,but when i using ,i find the underrun or overflow event, as described as datasheet:

      the speed about the UPP is not fast enough,so i guess it may be the reason about EDMA i used to caused the UOR event,How can i solved this question?Improve the priorit about UPP from 4 to 0?or change the value about the SDMAARBE or MDMAARBE in EMC block?

     Thank you

  • 0
    TI__Mastermind 20790 points

    Shaotu zhu,

    Yes, the transmission will not begin until the channel has loaded enough data to fill at least one full FIFO block.

    In receive mode, the FIFO is divided into eight 64-byte blocks.
    In transmit mode, the FIFO is divided into blocks that can be set to 64, 128, or 256 bytes.
    Refer the UPTCR register.

    System Priority:
    When the uPP operates in parallel with other data masters, such as EDMA,
    assigning higher priority to the uPP may help the uPP avoid underflow or overflow
    conditions. This is a fine adjustment.

    Refer the section "33.2.6.3 System Tuning Tips" in OMAPL138 TRM.

  • 0 in reply to Pubesh
    Prodigy 120 points

    Hi

           Thank you for your reply,I test them in loop mode, running in 75MHz,In my test,i set TXSIZEA = 1,and RDSIZEI=1,when i send data less than 128byte,it will not give ISR,when received,i can get data less than 128byte,but must more than 4byte,if less than 4byte, it will be error.It is in DLB mode,does it apply  to send or receive mode only?

      some link i see is as follows:

    http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/t/33332.aspx

  • 0 in reply to shaotu zhu
    TI__Mastermind 20790 points

    I hope you have got some details from that thread which is verified already.
    Refer the UPP example code for more understanding.
    This example code have DLB, transmit and receive modes.

    4064.upp_bios_drv_v10.zip