• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 98 subscribers
  • Views 257 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

C6678 unconnected pin blocks

William Ham
Intellectual 260 points

Are there any issues leaving the Hyperlink SERDES, Hyperlink SMBus, SGMII SERDES, MDIO MDCLK and PCIe SERDES pins unconnected?

Thanks in advance!

  • 0
    TI__Mastermind 18146 points

    Hi William,

    If EMAC is not used, the SerDes signals can be left unconnected. MDIO can be left
    unconnected, but results in an increase in leakage current. This could be avoided by
    adding an external pull-up resistor. If both EMAC and SRIO are not used, the
    RIOSGMIICLKP/N pins should be terminated.

    All Hyperlink clock and data pins (MCMRXFLCLK, MCMRXFLDAT, MCMTXFLCLK, MCMTXFLDAT,
    MCMRXPMCLK, MCMRXPMDAT, MCMTXPMCLK, MCMTXPMDAT) can be left floating when the
    entire Hyperlink peripheral is not used. Each unused Hyperlink clock and data pin will
    be pulled low when not in use through internal pull-down resistors.

    All unused PCIe lanes must be left floating and the unused lanes properly configured
    in the MMR. If the entire PCIe interface is not required, the PCIe peripheral should be
    disabled in the MMR.

    All unused pin requirements are discussed in Chapter 7 of the HW design guidelines:

    http://www.ti.com/litv/pdf/sprabh2a