I want to used EMIF16 for ADC device, not memory like SDRAM or FLASH.
And I don't know how to use CSL in 6657.
So, I made up this header file.
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//
struct EMIF_RCSR_BITS { // bits description
unsigned int MIN_REV:8;
unsigned int MJ_REV:8;
unsigned int MODULE_ID:14;
unsigned int rsvd:1;
unsigned int BE:1;
};
union EMIF_RCSR_REG {
Uint32 all;
struct EMIF_RCSR_BITS bit;
};
struct EMIF_AWCCR_BITS { // bits description
unsigned int MAX_EXT_WAIT:8;
unsigned int rsvd1:8;
unsigned int CS2_WAIT:2;
unsigned int CS3_WAIT:2;
unsigned int CS4_WAIT:2;
unsigned int CS5_WAIT:2;
unsigned int rsvd2:4;
unsigned int WP0:1;
unsigned int WP1:1;
unsigned int rsvd3:2;
};
union EMIF_AWCCR_REG {
Uint32 all;
struct EMIF_AWCCR_BITS bit;
};
struct EMIF_AnCR_BITS { // bits description
unsigned int ASIZE:2;
unsigned int TA:2;
unsigned int R_HOLD:3;
unsigned int R_STROBE:6;
unsigned int R_SETUP:4;
unsigned int W_HOLD:3;
unsigned int W_STROBE:6;
unsigned int W_SETUP:4;
unsigned int EW:1;
unsigned int SS:1;
};
union EMIF_AnCR_REG {
Uint32 all;
struct EMIF_AnCR_BITS bit;
};
struct EMIF_REGS {
union EMIF_RCSR_REG RCSR;
union EMIF_AWCCR_REG AWCCR;
union EMIF_AnCR_REG A1CR;
union EMIF_AnCR_REG A2CR;
union EMIF_AnCR_REG A3CR;
union EMIF_AnCR_REG A4CR;
};
#pragma DATA_SECTION(EMIFCtrlRegs,".emifcon");
volatile struct EMIF_REGS EMIFCtrlRegs;
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And edit link commander like this.
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MEMORY
{
L2SRAM (RWX) : org = 0x800000, len = 0x100000
EMIF : org = 0x20C00000, len = 0x4C
MSMCSRAM (RWX) : org = 0xc000000, len = 0x200000
EXDATA : org = 0x70000000, len = 0x4000000
DDR3 : org = 0x80000000, len = 0x20000000
}
SECTIONS
{
.text: load >> L2SRAM
.ti.decompress: load > L2SRAM
.stack: load > L2SRAM
GROUP: load > L2SRAM
{
.bss:
.neardata:
.rodata:
}
.cinit: load > L2SRAM
.pinit: load >> L2SRAM
.init_array: load > L2SRAM
.const: load >> L2SRAM
.data: load >> L2SRAM
.fardata: load >> L2SRAM
.switch: load >> L2SRAM
.sysmem: load > L2SRAM
.far: load >> L2SRAM
.emifcon: load >> EMIF
.exdata: load >> EXDATA
.args: load > L2SRAM align = 0x4, fill = 0 {_argsize = 0x0; }
.cio: load >> L2SRAM
.ti.handler_table: load > L2SRAM
.vecs: load >> L2SRAM
xdc.meta: load >> L2SRAM, type = COPY
}
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But, I set break point at first line in main function, I couldn't look for reset value EMIF16 Register in Watch express.
My work space is CCS5 and EVM6657.
