IPC Notify - SharedRegion cache line size configuration

Clement FR

Hello everyone,

Still on the subject of Notify with C6678.
Our cache configuration is as follow : L1 full cache, L2 full SRAM (no cache)

We use the DriverCirc driver forNotify.
We configure the SharedRegion entry 0 for IPC. It is put in MSMC RAM.

Should we use a cache line size of 64 (cache line size of L1D) or 128 (default) ?

On the documentation of the DriverShm (not the one we use) it is written "This driver supports caching and currently expects a cache line size of 128 Bytes"
is it the same cache line size setting as the one of the SharedRegion ?

Does the DriverCirc also expects a cache line size of 128 bytes ?

Thank you
Clement

over 12 years ago

0 judahvang over 12 years ago

TI__Mastermind 32475 points

Clement,

You can use a cache line size of 64 if your entry is in MSMCRAM.

The Notify Drivers take their cacheline size from SharedRegion.

Judah

0 Clement FR over 12 years ago in reply to judahvang

Genius 4750 points

Thanks again Judah,

Just to clear things up :

if I had L2 as full cache would it change something regarding the cache line size configuration?

Or can we sum up as a general rule :

SharedRegion 0 (for IPC) in MSMCRAM : cache line size = 64
in DDR3 : cache line size = 128

Clement

0 judahvang over 12 years ago in reply to Clement FR

TI__Mastermind 32475 points

Clement,

Correct, typically MSMCRAM is not cached in L2. If you somehow mapped MSMCRAM to a different address space where it is now being cached in L2 then you would need the cache line size to be 128 as well.

The general rule is...If cached only in L1 then Cache Line size is 64. If Cached in L2 (regardless if its cached in L1 or not) then Cache Line Size is 128.

Judah

0 Clement FR over 12 years ago in reply to judahvang

Genius 4750 points

Ok, all is clear.

Thread closed.

Clément

Processors

Processors forum

IPC Notify - SharedRegion cache line size configuration