CPU not waking up with 'WAKEUP' line

Which EzDSP board are you using?

The default direction of WAKEUP pin is input, it is programmed via bit 3 of 0x1930 RTCPMGT register. There is a sync between DSP and RTC clock domains which may take uptp 2 RTC clock cycles. Also RTC interrupt need to be all cleared. Best is to follow these steps to poll ALARMUPDT bit of 0x1901 RTCUPDATE register:

- Clear interrupt

- Wite to ALARMUPDT of 0x1901

- Poll ALARMUPDT until 0

This is a sample rtc_isr code:

rtc_isr:

       MOV #0803Fh, port(#0x1920)       ; clear the Periodic- and Alarm-Interrupt-Flag-Bit in the RTC-Register

       MOV #4000h, port(#0x1901)        ; Initiate update of alarm registers (ALARMUPDT bit of RTCUPDATE)

BITSET:

       MOV port(#0x1901), T0            ; Poll ALARMUPDT bit until 0 - RTC alarm registers updated

       BTST @#14, T0, TC1

       BCC BITSET, TC1

       RETI

Hope this help. We plan to write a wiki page to document this.

Regards.

Thanks Steve.

We are using the 5505.

Would the interaction with the RTC clock domain just prevent the stopping of the DSP main clock?

The problem is not with getting the main clock to stop.  The problem is with starting it again.  Even with WAKEUP held high and even with it configured as an output and driven high the DSP clock will stop and not start again.

Lorne

Hi Steve,

Further to my first response to this.....

We are not using the RTC interrupts so is the sync between DSP and RTC relevent?  If so, could you provide your example in 'C' since I am not using assembly.

Thanks again.

When the chip is in power down mode, only the RTC clock is running. The documentation explains this point:

“Writes to registers in the RTC power domain are synchronized to the RTC 32.768 kHz clock and can therefore take many CPU clock cycles to complete. The CPU clock must run at least three-times faster than the RTC, and writes to registers in the RTC domain will not be evident for up to two 32.768kHz clock cycles”

Also we clear the RTC interrupt because if the RTC interrupt is set when SYSCLKDIS bit is set – the interrupt opens the master clock gate and has higher priority than the SYSCLKDIS bit, and the master clock will not be gated. Refer to Usage Note 2.1.1 in the C5505 Errata: http://www.ti.com/lit/er/sprz310b/sprz310b.pdf

Sorry, we do not have C code.

Hope this help.

Regards.

I have read that errata and it implies that the master clock will not be gated (disabled) if a RTC interrupt occurs.  That is NOT the problem I am having.  I have no trouble stopping the clock.  The problem is starting it again.  The WAKEUP seems to have no effect when stopping the clock or trying to start it again; the clock always stops even if WAKEUP is high which the documentation say should not happen.

It appears that the WAKEUP pin function does not work.  Int0 and Int1 seem to work as advertised.

I am pretty sure it works but not as straight forward as INT0 & INT1. Thus we plan to create additional application note. Would INT0 & INT1 be adequate for your application?

Regards.

Hi,

For the WAKEUP pin to work as wakeup, you must enable the RTC interrupt in RTCINTEN and RTCINTREG - EXTINTEN bit.

Enable the RTC interrupt in the system IER register.

Then before SYSCLKDIS or LDO power down, you must ensure the RTC interrupt is cleared using the methods shown on the wiki page. If the interrupt is set, then SYSCLKDIS will have no effect - see errata.

After writing to the RTC interrupt register to clear the interrupt, you must wait 2 RTC clock cycles for the write to synchronize with the RTC domain.

The wiki code is very stable for the RTC-only mode where the LDOs are disabled and woken with the wakeup pin.

Hope this helps,
Mark

The product is now working with INT0 used for the wakeup.  Thanks.