This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DSP change frequency RDK 3.0 from 500 to 750 MHz

Other Parts Discussed in Thread: SYSBIOS

Hi TI forum members, I'm trying for several days now to configure the DSP (under IPNC Appro 8147) to run at a higher clock rate but in vain.

I've followed at least 10 different threads that converged into changing /ti_tools/ipnc_psp_04_04_00_01/u-boot/arch/arm/include/asm/arch-ti81xx/clocks_ti814x.h and I made sure /ti_tools/ipnc_psp_04_04_00_01/u-boot/board/ti/ti8148/evm.c (also noticed /ti_tools/ipnc_psp_04_04_00_01/u-boot/board/ti/ti8148_ipnc/evm.c) is properly build (even tried full system rebuild) but when i measure the DSP performance with some external clock (A8 or a physical hand timer) nothing is actually changed...

I opened this thread because I noticed 2 troubling messages while the system is booting:

U-Boot 2010.06 (Jun 13 2013 - 21:18:43) DM8127_IPNC_3.00.00

TI8148-GP rev 2.1

ARM clk: 600MHz
DDR clk: 400MHz
L3 clk: 200MHz
IVA clk: 450MHz
ISS clk: 400MHz
DSP Default OFF
DSS Default OFF

I2C: ready
DRAM: 512 MiB
NAND: HW ECC BCH8 Selected
256 MiB

>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>

[Q1] How come I don't see the DSP real clock if it's being setup in uboot? Can it be that I need to modify some parameters in my uboot so it will actually change the DSP clock?

Then, when the system is up (bios6-wise), I can see this strange message:

[c6xdsp ] ***** SYSTEM : Frequency <ORG> - 500000000, <NEW> - 750000000

>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>

I know that this comes from BIOS_getCpuFreq but I can't find the source for it (seems to be in the closed bios6 libraries). I know this is very peculiar as I already modified ipnc_rdk/ipnc_mcfw/mcfw/interfaces/link_api/system_common.h to be 

#define SYSTEM_DSP_FREQ            (750*1000*1000)

so the function takes its "info" from a direct PLL or upon setup time, maybe it's the ones that actually set my clock frequency and not uboot...

[Q2] How does BIOS_getCpuFreq derive the DSP clock frequency and how can i actually change it if not from uboot?

This frequency boost is highly critical for my project so I must understand how to make it work.

Please advise,

Regards,

Roei 

  • Have you tried looking at gel files for that particular board?

    SYSBIOS does not configure the PLL or setup the Clocks.  When BIOS_getCpuFreq is 500 mhz it simply expects the board to come up that way.  The configuration of this needs to be done outside of SYSBIOS.

    Judah

  • Hi Judah, one of my colleagues has pointed out that I simply forgot to burn the uboot (I just build it) :-)

    After we passed this minor technical glitch, we were able to see changes in the frequency. Still, it seems running at 750 MHz is unstable. We're trying to verify if we have an IPNC (Appro) that its max clock is 700 MHz. 

    My last question is whether this 500 MHz is simply some constant hard-coded in our bios6 libraries because no matter what we change, we keep seeing this message on bios6 up-phase:

    [c6xdsp ] ***** SYSTEM : Frequency <ORG> - 500000000, <NEW> - 700000000

    If I can just ignore this message then it's alright by me, I just want to avoid further mistakes (and yes, /Source/ipnc_rdk/ipnc_mcfw/mcfw/interfaces/link_api/system_common.h was changed to 700)?

    Regards,

    Roei

  • Roei,

    You should be able to change this via the configuration file (*.cfg).  Something like:

        var BIOS = xdc.useModule('ti.sysbios.BIOS');
        BIOS.cpuFreq.lo = 750000000;

    Judah