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What are the sys_int and host_int refer to in the 6678?

GANG ZHANG48047
Intellectual 875 points

Hi, in the TI Wiki page of "Configuring Interrupts on Keystone Devices", the following pic displays that there are 208 system interrupts and 114 host interrupts, where can I find that what interrupt sources are these interrupts refered to? In the 6678 user guide there is only 128 event interrupt in fig 7-38 for CorePacs, and 160 event interrupt in fig 7-39 for CIC0.

  • 0
    TI__Genius 12065 points

    I think the diagram is referring to C6670 interrupt topology, in which CIC0 (chip level INTC0) has 208 system events input.

    For the host interrupt output from CIC0, the maximum event number connected to CorePac seems to be "CIC0_OUT(64+9+10*n)" (event 31 input to CorePac).

    Since we have CorePac 0~3, the maximum output could be CIC0_OUT(64+9+10*3)=CIC0_OUT(103). So we have 104 (0~103) outputs from CIC0. (Not sure if it is typo in the diagram saying "114" instead of "104" Host Interrupts).

    But the key is the relationship between CorePac INTC and CIC. Because we only have 128 inputs to CorePac INTC but hundreds more system events, we need to use chip level interrupt controller CICn to do the extension. So that we could have more inputs to CorePac.

    There could be hundreds system events as input to CICn, and those inputs could be mapped to CICn outputs = host interrupts = channels.

    The number of CIC inputs (system events) and outputs (host interrupts) may not be equal. And not all CIC outputs are connected to CorePac inputs. There are some CIC outputs are dispatched to specific CorePac based on the core number such as "CIC0_OUT(64+9+10*n)".

    By programming CIC and CorePac INTC, we could get the specific system event mapped to CIC first and then mapped to CorePac eventually.

    For some system events that connected to CorePac INTC directly, we do not need to use CIC and can only program CorePac INTC for the interrupt generation.

    Hope it is clear now.