AM335x : 2 Ethernet PHY - MII issue

Hi,

We are trying to connect 2x MII due to BOM.

According to errata, it recommends to use 2-to-1 switch.

For Nand-booting, GPMC_WAIT0 should be connected to NAND. And then it will be switched to 2^nd Ethernet PHY.

Then how should we handle the NAND READY or BUSY pin? Is it OK although it’s left as NC.

Otherwise, for proper operation of NAND, should the pin connected to some other pin (gpmc_wait1) of AM335x ?

 ----------------from erata

3.1.6 Boot: Multiplexed Signals GPMC_WAIT0 and GMII2_CRS Cause NAND Boot Issue

The AM335x device multiplexes the GPMC_WAIT0 and GMII2_CRS signals on the same terminal. This

causes a problem when the system must support NAND boot while an MII Ethernet PHY is connected to

port 2 of the Ethernet media access controller and switch (CPSW). The GPMC_WAIT0 signal is required

for NAND boot. The GMII2_CRS signal is required by the MII Ethernet PHY and the only pin multiplexing

option for these signals is GPMC_WAIT0.

In this case, there are two sources that need to be connected to the GPMC_WAIT0 terminal. The NAND

READY or BUSY output must source the GPMC_WAIT0 terminal during NAND boot and the MII CRS

output must source the GPMC_WAIT0 terminal when the application software is using port 2 of the

CPSW. Therefore, a GPIO-controlled external 2-to-1 multiplexer must be implemented in the system to

select between the two sources. The GPIO selected to control the 2-to-1 multiplexer needs to have an

internal or external resistor that selects the NAND READY or BUSY output as soon as power is applied

and remains in that state until the application software initializes the CPSW.

The TI TS5A3157 SPDT analog switch is an example device that can be used as a 2-to-1 multiplexer.

This device inserts minimum propagation delay to the signal path since it is an analog switch. The

propagation delay inserted by the 2-to-1 multiplexer must be analyzed to confirm it does not cause timing

violations for the respective interface.

The NAND, Ethernet PHY, AM335x VDDSHV1, AM335x VDDSHV3 (when using the ZCZ package), and

2-to-1 multiplexer IO power supply domains may need to operate at the same voltage since they share

common signals.

Thanks ,

Devin