Questions on Extracting PHY register values

Hello KeckSoon,

You have many questions so please let me answer one by one.

> 1) Are there any documentation telling us what are the available registers under NETCP?

Instead, please let me answer how to find the MDIO registers and where they are located.  First, we find that MDIO are located in the Gigabit Ethernet (GbE) Switch Subsystem (SPRUGV9D).  The registers are shown in the Table 3-15 MDIO Registers.  Next, we need to identify where the MDIO registers group is located.  We can refer Table 2-1 KeyStone I Gigabit Ethernet Switch Subsystem Modules in the same manual.  It says that MDIO registers have offset 0x300 from the top of Gigabit Ethernet Switch Subsystem registers.

Secondly, we need to refer Network Coprocessor for KeyStone Devices User's Guide (SPRUGZ6).  In the Table 2-1 Network Coprocessor Memory Map of the SPRUGZ6, we find that Gigabit Ethernet Switch Subsystem (registers) has offset 0x9_0000 from the top of Network Coprocessor Memory Map.

Finally, we find the Network Coprocessor (NETCP) registers are located at 0x0200_0000 in the Table 2-2 Memory Map Summary (Part 2 of 7) of the TMS320C6678 Multicore Fixed and Floating-Point Digital Signal Processor data manual.

By this way, we find that MDIO registers are located at 0x0200_0000 + 0x9_0000 + 0x300.  I hope it helps though it is complicated.

In short, we have a tree structure that NETCP <- Gigabit Ethernet Switch Subsystem <- MDIO.  As you see, we have so many registers in NETCP due to this tree structure.

Regards,
Atsushi

> 2) Is the isPhyAlive() function checking for any particular registers in the PHY itself. If I have a custom board, is this a good method to use to see if the PHY is properly connected to the DSP?

The section "2.5.1 Global PHY Detection and Link State Monitoring" of "Gigabit Ethernet (GbE) Switch Subsystem User Guide (SPRUGV9D)" explains:

The MDIO module enumerates all PHY devices in the system by continuously polling the link status from the Generic Status Register of all 32 MDIO addresses. The module tracks whether a PHY on a particular address has responded, storing the results in the ALIVE Register.

As you see the implementation of the isPhyAlive(), the function simply returns the corresponding bit to the PHY address.  So if the MDIO module is appropriately configured, the function simply tells if the corresponding PHY is "alive."  The description in the Table 3-18 PHY Alive Status Register Field Descriptions may be also helpful.  Even if the board is custom, and your PHY is connected to MDIO and MDIO is appropriately setup, the function should work for your custom board.

Regards,
Atsushi

Hi KeckSoon,

I've read your code and also the CSL implementation.  I suspect that the CSL CSL_MDIO_getUserAccessRegister() might be implemented not appropriately.

I'm afraid but may I ask you to trace the function by debugger if the CSL code follows what User Guide mentioned?  The section 2.5.2.2 Reading Data from a PHY Register of the SPRUGV9D says as following.

The MDIO module includes a user access register (USERACCESSn) to directly access a specified PHY device. To read a PHY Register, perform the following:

1. Ensure that the GO bit in the USERACCESSn Register is cleared.
2. Write to the GO, REGADR, and PHYADR bits in USERACCESSn corresponding to the desired PHY and PHY Register.
3. The read data value is available in the DATA bits of USERACCESSn after the module completes the read operation on the serial bus.
4. Completion of a successful read operation will clear the GO bit, set the ACK bit,...

Following is the code which I've ever written for a different device from scratch.  C6678 MDIO has a similar implementation.  It's only for your reference purpose.

*MDIO_USERACCESS0 = 0x80000000
                  | (reg << 21)
                  | (phy << 16);
ct = 0;
error = 0;
while ((*MDIO_USERACCESS0 & (1 << 29)) == 0) {
    ct ++;
    if (ct > 100000) {
        error = 1;
    }
}

if (error == 0)
    val = *MDIO_USERACCESS0 & 0xffff;

Regards,
Atsushi