AM3352 MII input signal rise time

Chongzhi Liu

Other Parts Discussed in Thread: AM3352

In datasheet Table 5-3, Ethernet MAC/Switch Timing Conditions. Input signal rise time should be within 1~5 ns.

But I measured the input signal at ZCE package pin P18 MII1_RXD0, rise time is only 315 ps.

This signal is configured as 100M Hz Mii from phy. And I have checked IEEE 802.3 section2, the Mii spec, there is no requirement for signal rise time.

The Mii interface is working well by now. There is no functional issue. But I am not sure if the rise time over spec will be a potential risk.

Is this a real issue for AM3352? Thanks.

over 13 years ago

0 peaves over 13 years ago

TI__Guru 64655 points

FYI, it looks like you are using an old revision of the data sheet based on the title you referenced for Table 3-3. This title was changed in revision E and the current revision is F. I recommend you always use the latest data sheet. However, this is not relevant for your question related to minimum rise/fall time conditions defined in the data sheet.

AM335x was designed to meet the timing parameters defined in the data sheet based on these input conditions.

Providing a faster rise time than expected could be an issue if your PCB design and MII PHY generated a timing characteristic that was pushing the limits to less than 1ns of the timing requirements defined in the AM335x data sheet.

This should not be a problem if your product design is providing more than 1ns of margin for all AM335x timing requirements.

Regards,
Paul

0 Chongzhi Liu over 13 years ago in reply to peaves

Prodigy 70 points

Thanks, Paul.

I will try if the rise time can be slowed down.

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AM3352 MII input signal rise time