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OMAPL138: TM64P3_OUT12 pin

Christian Rückl
Intellectual 340 points
Other Parts Discussed in Thread: OMAP-L138

Hi,

I'm trying to trigger AD-conversion by the external pin of an timer. I have in general 2 questions about the timer output pin TM64P3_OUT12:

1.) Is there any difference between the pin TM64P3_OUT12 and TM64P2_OUT12? Are Both pins having the same signal and are related to timer12?

2.) Is my calculation of the pulsewidth of the outputsignal on the TM64P3_OUT12 pin correct? My systemclock is 456MHz and when i set PIWD=4, is the pulsewidth 10.9 ns? This sounds a little bit short for me for an external signal.... The ADC that i will use can handle a minimum pulsewidth of 15 ns..

Note: I got the calculation out of SPRUFM5d.pdf page 23.

 

Thanks a lot for helping me to understand!
BR,
Christian

  • 0
    Intellectual 340 points

    Ok, I got it by myself, almost.

    I found out that the frequency of the timer clocksource (internal) ist at 150 MHz. I thougt it should be the same as the system clock? I changed the frequency in linux on ARM side from 300 to 456 MHz and shouldn't also affect the system frequency of the DSP?

    Can anybody help me to understand or in which document it is written?

    Thanks
    Christian

  • 0 in reply to Christian Rückl
    TI__Guru* 81335 points

    Hi Christian,

    Thanks for post.
    Please refer the Datasheet (SPRS586) & TRM (SPRUH77) of OMAP-L138.

    Christian: said:

    1.) Is there any difference between the pin TM64P3_OUT12 and TM64P2_OUT12? Are Both pins having the same signal and are related to timer12?

    • There are 4 Timers available in OMAP-L138.
    • TM64P2_OUT12 and TM64P3_OUT12 are output pin of Timer 2 & 3 respectively.
    • Please refer the OMAP-L138 datasheet.

    Christian: said:

    2.) Is my calculation of the pulsewidth of the output signal on the TM64P3_OUT12 pin correct? My systemclock is 456MHz and when i set PIWD=4, is the pulsewidth 10.9 ns? This sounds a little bit short for me for an external signal.... The ADC that i will use can handle a minimum pulsewidth of 15 ns..

    • The clock configuration for the timers are explained in TRM Section 31.2.1.2 Clock Control.
    • Timer uses the internal clock by default.
    • Internal clock source to the timer is generated by the PLL controller (PLLC).

    Christian: said:

    I found out that the frequency of the timer clock source (internal) ist at 150 MHz. I thougt it should be the same as the system clock? I changed the frequency in linux on ARM side from 300 to 456 MHz and shouldn't also affect the system frequency of the DSP?

    • The PLLC0 & PLLC1 generates the Sysclock.
    • The Sysclock from PLLC0 is connected to ARM & DSP.
    • Please refer the Table 8-1 System PLLC Output Clocks from TRM Section 8.2.1 Device Clock Generation.
    • The ARM & DSP cores will operate at same frequency as the clock rate is fixed for PLL0_SYSCLK1(DSP) and PLL0_SYSCLK6(ARM).