• State Resolved
  • Locked Locked
  • Replies 11 replies
  • Subscribers 101 subscribers
  • Views 1445 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Clarity on Keystone II Endianness

Justin Henderson
Expert 1085 points
Other Parts Discussed in Thread: 66AK2H12, TCI6636K2H

According to the K2H12 data manual: 

The ARM CorePac can operate in either little endian or big endian mode. When the ARM CorePac is in little endian
mode and the rest of the system is in big endian mode, the bridges in the ARM CorePac are responsible for
performing the endian conversion.

How do I select the ARM and DSP corepac endianness? I notice there is LENDIAN and ARM_LENDIAN but the ARM_LENDIAN isn't documented. Could you please clarify how I ensure that my system has the same endianness.

Thanks.

Justin

  • 0
    Expert 1085 points

    Any information on this? I'll just route to uController GPIOs until I can understand this further.

  • 0 in reply to Justin Henderson
    Prodigy 120 points

    I'm also looking for clarification on the ARM_LENDIAN functionality on the 66AK2H12. Table 4-2 of the 66AK2H12/06 data manual indicates that the functionality is shared with GPIO15 (Ball B31). But GPIO15 is used extensively as a feature control pin in numerous boot modes as indicated in Figure 7-1. At the rising edge of RESETFULL# the GPIO pins are clocked into the DEVSTAT register to select the boot mode feature, but when is the ARM_ENDIAN selection sampled on GPIO15?

  • 0 in reply to Dale Gifford
    TI__Guru** 116170 points

    Justin,

    You can read the SYSTEM Endianness from the SYSENDSTAT documented in the K2H datasheet. The master ARM core always boots up in little endian mode, you can switch the ARM endian by using the following code. For big endian, you can switch the ARM to big endian by using the following code:

    void armSwitchBigEndian()
    {
        asm(
            "    mcr     p15, #0, r0, c8, c7, #0             \t\n"    //invalidate the unified TLB
            "    dsb                                            \t\n"    //data sychronization barrier
            //must use two movw instructions instead of a ldr instruction because we do not know the current endianness
            "    movw    r0, #0x0100                         \t\n"    //r0 = 0x00000100
            "    movw    r1, #0x0030                         \t\n"    //r1 = 0x00000030
            "    add     r0, r1, r0, lsl #16                 \t\n"    //r0 = 0x01000030 ((r0<<16)+r1)
                                                
            "    mrc     p15, #0, r1, c0, c0, #5             \t\n"    //r1 = multi-processor affinity register (current core number stored in bits 1:0 of the MPAR)
            "    and     r1,  r1, #3                         \t\n"    //r1 = current core number (MPAR & 0b11)
            "    add     r0,  r0, r1, lsl #2                 \t\n"    //r0 = 0x01000030 + (core number * 4)
            "    movw    r2, #0x0000                            \t\n"    //r2 = 0x00000000
            "    add     r1,  r2, r2, lsl#16                  \t\n"    //r1 = 0x00000000
            "    str     r1, [r0]                            \t\n"    //*r0 = r1 (*0x0100003X = 0x00000000)
                                                
            "    setend  BE                                  \t\n"    //set endian to big endian
            //The following synchronization barriers ensure that no other instructions or data enter the pipeline until the previous instructions have completed
            "    isb                                         \t\n"    //instruction synchronization barrier
            "    dsb                                            \t\n"    //data synchronization barrier
        );
    }

    Regards,

    Rahul

  • 0 in reply to Rahul Prabhu
    Prodigy 120 points

    I still have a few questions about the ARM_LENDIAN pin (Ball B31 on the 66AK2H12), which is mentioned in Table 4-2 of the 66AK2H12 data manual:

    1. If the ARM cores of the 66AK2H12 always come out of reset in little endian mode, then what is the purpose of the ARM_LENDIAN pin?
    2. Table 7-28 of the 66AK2H12 data manual indicates that the pin is reserved and a pulldown resistor is required. But the ARM_LENDIAN pin is shared with GPIO15 and is used to select various boot mode options as described in table 7-1. For example, to boot from SPI interface 2 or 3 requires that GPIO15 pulled HIGH and that conflicts with having ARM_LENDIAN pulled LOW. There are numerous other boot modes where GPIO15 needs a pullup.
    3. Is the documentation incorrect and the ARM_LENDIAN functionality should be ignored?

    Thanks in advance for your help.

  • 0 in reply to Dale Gifford
    Expert 1085 points

    Dale, thank you for formulating these questions. Did you ever find any further information on this?

    Dale Gifford said:

    I still have a few questions about the ARM_LENDIAN pin (Ball B31 on the 66AK2H12), which is mentioned in Table 4-2 of the 66AK2H12 data manual:

    1. If the ARM cores of the 66AK2H12 always come out of reset in little endian mode, then what is the purpose of the ARM_LENDIAN pin?
    2. Table 7-28 of the 66AK2H12 data manual indicates that the pin is reserved and a pulldown resistor is required. But the ARM_LENDIAN pin is shared with GPIO15 and is used to select various boot mode options as described in table 7-1. For example, to boot from SPI interface 2 or 3 requires that GPIO15 pulled HIGH and that conflicts with having ARM_LENDIAN pulled LOW. There are numerous other boot modes where GPIO15 needs a pullup.
    3. Is the documentation incorrect and the ARM_LENDIAN functionality should be ignored?

    Thanks in advance for your help.

  • 0 in reply to Justin Henderson
    Prodigy 120 points

    Justin,

    I have not received any additional information regarding the ARM_LENDIAN issues.

    I'm still waiting for somebody from TI to provide an official reply or provide the information to clarify how the pins should be connected. I hope somebody from TI responds soon, because I'm getting closer to having a schematic completed and I would really like to know what to do prior to going to FAB.

  • 0 in reply to Dale Gifford
    Prodigy 120 points

    Hello TI,

    Am I ever going to get clarification on the functionality of the ARM_LENDIAN pin (ball B31 on the 66AK2H12)? The documentation has conflicting statements and I need more information that only TI can provide. When can I expect some help? It's been over a month since the first question in this thread was posted. I think I've been reasonably patient, but it's getting to be a little ridiculous don't you think? If you can't answer the questions or provide the requested documentation, then at least point me in a direction to proceed.

  • 0 in reply to Dale Gifford
    TI__Mastermind 46460 points

    On the 66AK2H12/06, there are 2 pins that control endian mode operation.  The system LENDIAN pin is muxed with GPIO[0] on pin F29.  The ARM_LENDIAN pin is muxed with GPIO[15] on pin B31.  Lendian is reflected in the DEVSTAT register in bit 0.  This explains the physical control.  For more information on the software support of these modes, please refer to the MCSDK documentation.

    Tom

     

  • 0 in reply to Tom Johnson 16214
    TI__Mastermind 46460 points

    Dale,

    My previous post was incorrect.  The ARM_LENDIAN pin functionality on pin B31 was deprecated.  Rahul's post previously is completely correct.  The Linux on the ARM core always boots in Little Endian mode.  This mode can be changed through software as he explained.

    Support for the system LENDIAN pin remains as documented in the Data Manual.

    Tom

     

  • 0 in reply to Tom Johnson 16214
    Intellectual 430 points

    Hi Justin, Dale, Rahul, Tom,

    Greetings !!!

    I am new in TI DSP development.
    I am working on XTCIEVMK2X - TCI6636K2H evm.
    It will be really helpful if you guys help me on some of my querries.
    I have created separate thred for this but didnt got proper help. Hope you guys can help me.

    We are using above mentioned EVM to port our DSP code which is written for big endian system.
    Its mentioned that we can change boot mode to big endian using DIP switch setting.
    There are multiple boot modes are available under category "User Programmable".

    How we can configure this "User Programmable" option for big endian mode ?

    Do we need to rebuild IBL for big endian system?
    If yes what is the procedure ?

    Link to original thread -
    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/295540/1031665.aspx#1031665

    Thanks in advance.

    Regards,

    Vishal

  • 0 in reply to Vishal Ingulkar
    Intellectual 430 points

    Hi..

    I think I have got it.

    [00:00:43]  BMC>bootmode all                                                    
    [00:00:43]  Executing command "bootmode"                                        
    [00:00:43]   0 0x0000000000110CE7   ARM NAND                                    
    [00:00:43]   1 0x0000000000100001   DSP No-Boot                                 
    [00:00:43]   2 0x0000000000112005   ARM SPI......Current Bootmode               
    [00:00:43]   3 0x0000000000100003   ARM I2C                                     
    [00:00:43]   4 0x0000000000100CEF   ARM UART                                    
    [00:00:43]   5 0x0000000000111CEB   ARM RBL ENET                                
    [00:00:43]   6 0x00000000001010E1   SLEEP W/ MAX PLL & ARM BYPASS               
    [00:00:43]   7 0x0000000000103EE1   SLEEP W/ MAX PLL                            
    [00:00:43]   8 0x00000000001101E7   DSP NAND                                    
    [00:00:43]   9 0x00000000001010C1   SLEEP W/ SLOW PLL & ARM BYPASS              
    [00:00:43]  10 0x0000000000112105   DSP SPI                                     
    [00:00:43]  11 0x0000000000100103   DSP I2C                                     
    [00:00:43]  12 0x0000000000100DEF   DSP UART                                    
    [00:00:43]  13 0x00000000001111EB   DSP RBL ENET                                
    [00:00:43]  14 0x0000000000103CC1   SLEEP W/ SLOW PLL & SLOW ARM PLL            
    [00:00:43]  15 0x0000000000100001   DSP No-Boot  

    If I change last bit of any boot mode ( 1 -> 0 ) it will work for big endian.
    We can change bootmode 8 to 15.

    So for example command to change bootmode

    bootmode 2 0 112005 ARM_SPI  (little endian)
    bootmode 10 0 112004 arm_spi  (big endian)

    Is my understanding correct ?

    Regards,

    Vishal