Hello,
I am studying the OMAP3530 and I have some questions about this processor:
- I have read the technical reference OMAP35x and I think that the number of memories supported of POP implementation are of three in total, no each type of memory. I would know if I am right.
- I have a doubt about the Camera ISP subsystem. In the block diagram of the OMAP3530 (figure 1-4) only appears the parallel interface, but the chapter of Camera ISP subsystem (chapter 12) explains other interfaces too.
- In OMAP3530, which is the maxim capacity of the ROM memory of the level 2 hierarchy (L2) of the DSP?
I would be grateful if someone could clarify me these doubts.
Thanks,
Alejandro