This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320C6678 PCIe reference clock- spread spectrum requirements

Other Parts Discussed in Thread: TMS320C6678

In section 3.5.6 of the sprabi2b.pdf (6/7/2013) it states that spread spectrum reference clocks are allowed for the PCIe and Hyperlink reference clocks. However, I’m am not able to find any specific spread spectrum requirements ( % spread, up, down or frequency). Can you help me out with this?

  • Tom,

    According to the Data Sheet (SPRS691D/tms320c6678.pdf), sec 7.16 the electrical specifications for the interface are to be taken from the PCI Express Base Specification Revision 2.0 of PCI-SIG.  Do you have access to this document?

    The PCIe User Guide (SPRUGSC), sec 2.2 has some additional information on where in the Specification to look for clocking information.

     

    Regards.

  • The KeyStone Hardware Design Guide SPRABI2 also contains masks showing the random jitter tolerance when using a common clock such as when operating with a spread spectrum clock.  The frequency variations of spread spectrum clocking appears as low frequency random jitter.  The random jitter mask must be met.

    Tom