Is architected timer available on OMAP5432 uEVM ES2.0 board?

Architected timers are available on the EVM (reading the CP15 PFR1 register shows generic timer support is enabled).

They are not enabled in the linux kernel as the device tree file does not specify all the interrupts needed to enable the timers.

Architected timer can be enabled by changing the /arch/arm/boot/dts/omap5.dtsi file as below:

             cpu@0 {

                        compatible = "arm,cortex-a15";
                        timer {
                                compatible = "arm,armv7-timer";
                                /* 14th PPI IRQ, active low level-sensitive */
                                interrupts = <1 13 0xf08>,
                                             <1 14 0xf08>,
                                             <1 11 0xf08>,
                                             <1 10 0xf08>;
                                clock-frequency = <6144000>;
                        };

(Add similar interrupt entry for CPU1)

Above changes are based on the documentation available in Documentation/devicetree/bindings/arm/arch_timer.txt

Thanks. But I've already changing the device tree as you suggested.

My question raised from the attempt that I try to get CNTFRQ from reading the register directly. I read arch_timer_init() in kernel and found that arch_timer_rate is read from device tree. However, if I'm trying to read the CNTFFQ directly in arch_timer_available(), it returns 0, which implies "Architected timer frequency not available". And I didn't find where CNTFRQ would be initialized with the value from DTS.

I am sorry I misunderstood your question earlier.

As per my understanding from the ARM Architecture Reference Manual, I believe the timer/counter frequency is fixed for a system. The initialization code (u-boot or linux?) is responsible for writing this value to CNTFRQ register so that it can be referred by the software later. In the case of EVM, it seems that neither u-boot nor Linux is writing to CNTFRQ. However, this should not affect the working of the timer.

From the ARM architecture reference manual:

"Typically, the system drives the system counter at a fixed frequency and the CNTFRQ register must be programmed
to this value during the system boot process. "


"Programming CNTFRQ does not affect the system clock frequency. However, on system initialization, CNTFRQ
must be correctly programmed with the system clock frequency, to make this value available to software."

For the question of whether architected timer is supported on the EVM, I issued 'cat /proc/interrupts' on Linux and saw several interrupts from the architected timer,

root@localhost:~# cat /proc/interrupts
           CPU0       
 27:       1699       GIC  arch_timer           <====
 44:          0       GIC  DMA
 52:          0       GIC  gpmc
 70:          0       GIC  gp_timer
105:         81       GIC  OMAP UART1
109:       8505       GIC  ehci_hcd:usb1

Probably this is a roundabout way to conclude that architected timer support is available?