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C6713 DSK audio loopback

Ilias Trachanas
Prodigy 60 points

Hello everybody,

I bought a TMS320C6713 DSK board and found example code that realizes:

1. a tone output in the headphone

2. an audio loopback from the microphone to the headphone.

After I tested both variants the second didn't work. Here is the code:

/*
 * main.c
 */
#include "dsk6713.h"
#include "dsk6713_aic23.h"
#include "DSKintr.h"

/* Codec configuration settings */
/* See dsk6713_aic23.h and the TLV320AIC23 Stereo Audio CODEC Data Manual */
/* for a detailed description of the bits in each of the 10 AIC23 control */
/* registers in the following configuration structure.                    */

DSK6713_AIC23_Config config = { \
    0x0017,  /* 0 DSK6713_AIC23_LEFTINVOL  Left line input channel volume */ \
    0x0017,  /* 1 DSK6713_AIC23_RIGHTINVOL Right line input channel volume */\
    0x00d8,  /* 2 DSK6713_AIC23_LEFTHPVOL  Left channel headphone volume */  \
    0x00d8,  /* 3 DSK6713_AIC23_RIGHTHPVOL Right channel headphone volume */ \
    0x0011,  /* 4 DSK6713_AIC23_ANAPATH    Analog audio path control */      \
    0x0000,  /* 5 DSK6713_AIC23_DIGPATH    Digital audio path control */     \
    0x0000,  /* 6 DSK6713_AIC23_POWERDOWN  Power down control */             \
    0x0043,  /* 7 DSK6713_AIC23_DIGIF      Digital audio interface format */ \
    0x0081,  /* 8 DSK6713_AIC23_SAMPLERATE Sample rate control (48 kHz) */   \
    0x0001   /* 9 DSK6713_AIC23_DIGACT     Digital interface activation */   \
};

void main(void){

  DSK6713_AIC23_CodecHandle hCodec;
  Uint32 test_save[100], sample_pair;
  Int16 test_idx;

  /* Initialize the interrupt system */
  intr_reset();

  /* dsk6713_init() must be called before other BSL functions */
  DSK6713_init(); /* In the BSL library */

  /* Start the codec */
  hCodec = DSK6713_AIC23_openCodec(0, &config);

  /* Change the sampling rate to 16 kHz */
  DSK6713_AIC23_setFreq(hCodec, DSK6713_AIC23_FREQ_16KHZ);

  test_idx = 0;
  /* Read left and right channel samples from the ADC and loop */
  /* them back out to the DAC.                                 */
  for(;;){
    while(!DSK6713_AIC23_read(hCodec, &sample_pair));
    test_save[test_idx] = sample_pair;
    test_idx++;
    if(test_idx == 100) test_idx = 0;
    while(!DSK6713_AIC23_write(hCodec, sample_pair));
  }
}

When I look into the vector "test_save" I found zeros, ones, 65534 and 65535.

I am sure that the mic I am using is working. I am using CCS V5.4

Has anybody any idea what is going on? Thank you in advance!

  • 0
    TI__Guru* 81335 points

    Ilias Trachanas,

    The DSK6713 comes with examples to do simple audio pass-through. Please start with one of those so you will start with something that is known to work well. Check all board settings and connections to make sure everything is correct.

    Also, you can go to the TI Wiki Pages and search for "C6713 Workshop" (no quotes) to find online training material from one of our archived workshops. The online material includes labs and solutions that do audio input/output.

    Please reply back to let us know if you find adequate information, or if you have further problems with these examples.

    Thanks.

  • 0 in reply to Raja
    Prodigy 60 points

    Dear Rajasekaran K,

    thanks a lot for your reply. I tried to find examples for the DSK6713 by searching into the CD provided by Spectrum Digital and the internet and I couldn't find anything that has to do with the audio chip found in the DSK.

    Could you please send me the code or provide me with more information on where to find it?

    Thank you in advance

  • 0 in reply to Ilias Trachanas
    TI__Guru* 81335 points

    Hi,

    Please find the DSP Integration Workshop materials from below link. (Refer Lab4 - audioapp)

    http://processors.wiki.ti.com/index.php/TMS320C6x1x_DSP_Integration_Workshop#Workshop_Materials

    For creating the projects in CCSv5 for C6713DSK refer below link.

    http://processors.wiki.ti.com/index.php/C6713DSK_in_CCSv5

    Thanks.

  • 0
    TI__Guru* 81335 points

    Hi,

    Could you able the run the audio loopback project? Any update?

    Thanks.

  • 0 in reply to Raja
    Prodigy 60 points

    Hi,

    thanx a lot for your interest! After my holidays I again started working on the project. I read all the details for the lab6 and did all steps to make the audio loopback project work. Unfortunately I still have the problem that the edma interrupts (edmaHwi routine) don't run. This is because I cannot run the DSP/BIOS configuration tool on CCS 5.4.

    Any suggestions on how I can solve this?

    I appreciate your help. Thank you in advance.

  • 0 in reply to Ilias Trachanas
    TI__Guru* 81335 points

    Hi,

    Please refer the DSP/BIOS user guide(spru423) for running the DSP/BIOS Configuration tool in CCS5.

    Please find the UG in the below link.

    http://www.ti.com/lit/ug/spru423i/spru423i.pdf

    Thanks.

  • 0 in reply to Raja
    Prodigy 60 points

    Hi,

    I created a .tcf file in my project (solution of the lab6), opened it with the configuration tool and did the appropriate changes (1. HWI_INT8 -> edmaHwi, 2. use dispatcher). When I run the project in the DSK6713 I still observe that the edma interrupts don't run (I set a breakpoint at the beginning of the edmaHwi routine).

    Any suggestions on what else I should check / try?

    Thanks.

  • 0 in reply to Ilias Trachanas
    Prodigy 90 points

    I think I have a similar problem:

    I am trying to run an example which realizes a loopback from the microphone to the headphone, too. The main part of the code is at the end of my question. The complete code is appended as zip-file.

    Actually, the example doesn't work. I tried to make little steps to solve the problem. I managed to generate some sinus via a lookup table (array Frequenzy1, Frequenzy2, Frequenzy3). This means the configuration was succesfull and the transmit configuration of the AIC23 should be correct.

    Than I tried to get the received microfone data into an array:

    Microphone[counter1] = MCBSP_read(hMcbsp1);

    But this was not succesfull. I tried different ways. I checked "MCBSP_xrdy(hMcbsp1)" and "MCBSP_rfull(hMcbsp1)" but this didn't help. I got some values but only exreme values like 0x0000 0x0001 and 0xFFFF. THIS IS MY FIRST PROBLEM.

    My second problem ist: In the end I want to use the the EDMA. As a first step I wanted to check the status of the MCBSP via interrupt but I wasn't succesfull. I tried the following way:

    Configured a HWI in the tcf-File as shown on the Screenshot. (Curiously I didn't find "MCBSP_1_transmit" but only "MCSP_1_transmit". Is this the same?).

    I added the function "void MCBSP_1_DataReceived(void);" to my code (actually I check wether data is transmitted, but the name is not important so far). I know the MCBSP is transmitting data, because I hear the "sine" from my speakers. I set a breakpoint in the function "void MCBSP_1_DataReceived(void);" an debugged but the function was never called. THIS IS MY SECOND PROBLEM.

    Maybe the tcf-file isn't correct. It's from an example written for an older version of CCS. Unfortunately I didn't found any example for the CCSv5. So I hope you can help me.


    #include "dsk_appcfg.h"

    /*
     *  These are include files that support interfaces to BIOS and CSL modules
     *  used by the program.
     */
    #include <std.h>
    #include <swi.h>
    #include <log.h>
    #include <c6x.h>
    #include <csl.h>
    #include <csl_edma.h>
    #include <csl_irq.h>
    #include <csl_mcbsp.h>
    #include <math.h>

    /*
     *  The 6713 DSK Board Support Library is divided into several modules, each
     *  of which has its own include file.  The file dsk6713.h must be included
     *  in every program that uses the BSL.  This example also uses the
     *  DIP, LED and AIC23 modules.
     */
    #include "dsk6713.h"
    #include "dsk6713_led.h"
    #include "dsk6713_dip.h"
    #include "dsk6713_aic23.h"

    /* Function prototypes */
    void initIrq(void);
    void initMcbsp(void);
    void initEdma(void);
    void copyData(Int16 *inbuf, Int16 *outbuf, Int16 length);
    void processBuffer(void);
    void edmaHwi(void);
    void mcbspReceive(void);
    void MCBSP_1_DataReceived(void);

    /* Constants for the buffered ping-pong transfer */
    #define BUFFSIZE 1000
    #define PING 0
    #define PONG 1

    /*
     * Data buffer declarations - the program uses four logical buffers of size
     * BUFFSIZE, one ping and one pong buffer on both receive and transmit sides.
     */
    Int16 gBufferXmtPing[BUFFSIZE]; // Transmit PING buffer
    Int16 gBufferXmtPong[BUFFSIZE]; // Transmit PONG buffer

    Int16 gBufferRcvPing[BUFFSIZE]; // Receive PING buffer
    Int16 gBufferRcvPong[BUFFSIZE]; // Receive PONG buffer

    Int32 globalCounter1;

    EDMA_Handle hEdmaXmt; // EDMA channel handles
    EDMA_Handle hEdmaReloadXmtPing;
    EDMA_Handle hEdmaReloadXmtPong;
    EDMA_Handle hEdmaRcv;
    EDMA_Handle hEdmaReloadRcvPing;
    EDMA_Handle hEdmaReloadRcvPong;

    MCBSP_Handle hMcbsp1; // McBSP1 (codec data) handle

    Int16 gXmtChan; // TCC codes (see initEDMA())
    Int16 gRcvChan;

    /*
     *  EDMA Config data structure
     */

    /* Transmit side EDMA configuration */
    EDMA_Config gEdmaConfigXmt =
    { EDMA_FMKS(OPT, PRI, HIGH) | // Priority
            EDMA_FMKS(OPT, ESIZE, 16BIT) | // Element size
            EDMA_FMKS(OPT, 2DS, NO) | // 2 dimensional source?
            EDMA_FMKS(OPT, SUM, INC) | // Src update mode
            EDMA_FMKS(OPT, 2DD, NO) | // 2 dimensional dest
            EDMA_FMKS(OPT, DUM, NONE) | // Dest update mode
            EDMA_FMKS(OPT, TCINT, YES) | // Cause EDMA interrupt?
            EDMA_FMKS(OPT, TCC, OF(0)) | // Transfer complete code
            EDMA_FMKS(OPT, LINK, YES) | // Enable link parameters?
            EDMA_FMKS(OPT, FS, NO), // Use frame sync?

            (Uint32) & gBufferXmtPing, // Src address //Speicherstelle, auf die die EDMA zugreift?

            EDMA_FMK (CNT, FRMCNT, NULL) | // Frame count
                    EDMA_FMK (CNT, ELECNT, BUFFSIZE), // Element count

            EDMA_FMKS(DST, DST, OF(0)), // Dest address

            EDMA_FMKS(IDX, FRMIDX, DEFAULT) | // Frame index value
                    EDMA_FMKS(IDX, ELEIDX, DEFAULT), // Element index value

            EDMA_FMK (RLD, ELERLD, NULL) | // Reload element
                    EDMA_FMK (RLD, LINK, NULL) // Reload link
    };

    /* Receive side EDMA configuration */
    EDMA_Config gEdmaConfigRcv =
    { EDMA_FMKS(OPT, PRI, HIGH) | // Priority
            EDMA_FMKS(OPT, ESIZE, 16BIT) | // Element size
            EDMA_FMKS(OPT, 2DS, NO) | // 2 dimensional source?
            EDMA_FMKS(OPT, SUM, NONE) | // Src update mode
            EDMA_FMKS(OPT, 2DD, NO) | // 2 dimensional dest
            EDMA_FMKS(OPT, DUM, INC) | // Dest update mode
            EDMA_FMKS(OPT, TCINT, YES) | // Cause EDMA interrupt?
            EDMA_FMKS(OPT, TCC, OF(0)) | // Transfer complete code
            EDMA_FMKS(OPT, LINK, YES) | // Enable link parameters?
            EDMA_FMKS(OPT, FS, NO), // Use frame sync?

            EDMA_FMKS(SRC, SRC, OF(0)), // Src address

            EDMA_FMK (CNT, FRMCNT, NULL) | // Frame count
                    EDMA_FMK (CNT, ELECNT, BUFFSIZE), // Element count

            (Uint32) & gBufferRcvPing, // Dest address

            EDMA_FMKS(IDX, FRMIDX, DEFAULT) | // Frame index value
                    EDMA_FMKS(IDX, ELEIDX, DEFAULT), // Element index value

            EDMA_FMK (RLD, ELERLD, NULL) | // Reload element
                    EDMA_FMK (RLD, LINK, NULL) // Reload link
    };

    /* McBSP codec data channel configuration */
    static MCBSP_Config mcbspCfg1 =
    {
            MCBSP_FMKS(SPCR, FREE, NO)              | //Während dem stoppen der Emulation stoppt auch die Clock des McBSP
            MCBSP_FMKS(SPCR, SOFT, NO)              | //Beim Stoppen der Emulation (des Debuggens) wird die Übertragung sofort abgebrochen
            MCBSP_FMKS(SPCR, FRST, YES)             | //Frame Synchronisation "is not generated by the sample-rate generator" - ist von anderem Faktor abhängig (siehe (SRGR, FSGM, DXR2XSR))
            MCBSP_FMKS(SPCR, GRST, YES)             | //Sample Rate wird zurückgesetzt/gelöscht
            MCBSP_FMKS(SPCR, XINTM, XRDY)           | //XINT (Interrupt, der der CPU meldet, das eine Übertragung abgeschlossen ist) wird durch das Bit RRDY ausgelöst
            MCBSP_FMKS(SPCR, XSYNCERR, NO)          | //Synchronisationsfehler wird nicht behandelt
            MCBSP_FMKS(SPCR, XRST, YES)             | //Sender ist eingeschaltet (enabled)
            MCBSP_FMKS(SPCR, DLB, OFF)              | //Digital Loop Back ist ausgeschaltet
            MCBSP_FMKS(SPCR, RJUST, RZF)            | //Im DRR (Data Receive Register) werden die Bits rechtsbündig mit Nullen aufgefüllt abgelegt.
            MCBSP_FMKS(SPCR, CLKSTP, DISABLE)        | //Clock läuft immer
            MCBSP_FMKS(SPCR, DXENA, OFF)            | //DX- Enabler wird nicht verwendet
            MCBSP_FMKS(SPCR, RINTM, RRDY)           | //(Analaog zu XINTM) RINT wird durch das Bit RRDY ausgelöst
            MCBSP_FMKS(SPCR, RSYNCERR, NO)          | //Synchronisationsfehler wird nicht behandelt
            MCBSP_FMKS(SPCR, RRST, YES),              //Empfänger ist resettet und ausgeschaltet

                                                      //RCR Receive control register value
            MCBSP_FMKS(RCR, RPHASE, SINGLE)         | //Von der Bedeutung her analog zum Transmit control register, nur eben für den Empfängereingang.
            MCBSP_FMKS(RCR, RFRLEN2, DEFAULT)        |
            MCBSP_FMKS(RCR, RWDLEN2, DEFAULT)         |
            MCBSP_FMKS(RCR, RCOMPAND, MSB)            |
            MCBSP_FMKS(RCR, RFIG, NO)                 |
            MCBSP_FMKS(RCR, RDATDLY, 0BIT)            |
            MCBSP_FMKS(RCR, RFRLEN1, OF(1))         |
            MCBSP_FMKS(RCR, RWDLEN1, 16BIT)            |
            MCBSP_FMKS(RCR, RWDREVRS, DISABLE),

                                                      //Transmit control register value
            MCBSP_FMKS(XCR, XPHASE, SINGLE)         | //"Single-phase frame" --> alle Frames sind gleich lang. Es gelten nur die Festlegungen für Phase 1
            MCBSP_FMKS(XCR, XFRLEN2, DEFAULT)       | //Phase 2: Irrelevant, es wird nur Phase 1 verwendet
            MCBSP_FMKS(XCR, XWDLEN2, DEFAULT)       | //Phase 2: Irrelevant, es wird nur Phase 1 verwendet
            MCBSP_FMKS(XCR, XCOMPAND, MSB)          | //Datenübertragung startet mit dem MSB
            MCBSP_FMKS(XCR, XFIG, NO)               | //Ein Puls des Framesynchronisationssignals führt zu einem Erneuten starten der Übertragung
            MCBSP_FMKS(XCR, XDATDLY, 0BIT)          | //Delay von 0 Bit
            MCBSP_FMKS(XCR, XFRLEN1, OF(1))         | //Phase 1: Ein Frame besteht aus 2 Datenwörtern, | //ACHTUNG: "SPRU580E_MCBSP.pdf", Seite 89: XFRLEN1 0-7Fh (XFRLEN1 + 1) specifies the transmit frame length (number of words) in phase 1. --> es werden hier also zwei Frames übertragen, wie auch in "aic23.pdf", Seite 3-8 im Abschnitt "DSP Mode" beschrieben
            MCBSP_FMKS(XCR, XWDLEN1, 16BIT)         | //Phase 1: Ein Datenwort ist 16 bit lang
            MCBSP_FMKS(XCR, XWDREVRS, DISABLE),          //Feature disabled

                                                        //Sample rate generator register value
            MCBSP_FMKS(SRGR, GSYNC, DEFAULT)         | //Registerwerte spielen keine Rolle, da der Takt nicht vom McBSP, sondern vom AIC23 vorgegeben wird.
            MCBSP_FMKS(SRGR, CLKSP, DEFAULT)        |
            MCBSP_FMKS(SRGR, CLKSM, DEFAULT)         |
            MCBSP_FMKS(SRGR, FSGM, DEFAULT)            |
            MCBSP_FMKS(SRGR, FPER, DEFAULT)         |
            MCBSP_FMKS(SRGR, FWID, DEFAULT)            |
            MCBSP_FMKS(SRGR, CLKGDV, DEFAULT),


            MCBSP_MCR_DEFAULT,
            MCBSP_RCER_DEFAULT,
            MCBSP_XCER_DEFAULT,


            MCBSP_FMKS(PCR, XIOEN, SP)              | //Die Anschlüsse DX, FSX und CLKX werden für den McBSP verwendet und dienen nicht als gewöhnliche I/O-pins.
            MCBSP_FMKS(PCR, RIOEN, SP)              | //Die Anschlüsse DR, FSR, CLKR und CLKS werden für den McBSP verwendet und dienen nicht als gewöhnliche I/O-pins.
            MCBSP_FMKS(PCR, FSXM, EXTERNAL)         | //Rahmensynchronisationssignal kommt von extern (AIC23)
            MCBSP_FMKS(PCR, FSRM, EXTERNAL)            | //Rahmensynchronisationssignal kommt von extern (AIC23)
            MCBSP_FMKS(PCR, CLKXM, INPUT)             | //Der Pin CLKX ist ein Eingang, der den Clock von extern bekommt.
            MCBSP_FMKS(PCR, CLKRM, INPUT)            | //Der Pin CLKR ist ein Eingang, der den Clock von extern bekommt.
            MCBSP_FMKS(PCR, CLKSSTAT, DEFAULT)         | //kein gewöhnlicher I/O-pin, deshalb irrelevant
            MCBSP_FMKS(PCR, DXSTAT, DEFAULT)        | //kein gewöhnlicher I/O-pin, deshalb irrelevant
            MCBSP_FMKS(PCR, FSXP, ACTIVEHIGH)         | //Rahmensynchronisationssignal (Sender) ist aktiv, wenn es "high" ist.
            MCBSP_FMKS(PCR, FSRP, ACTIVEHIGH)        | //Rahmensynchronisationssignal (Empfänger) ist aktiv, wenn es "high" ist.
            MCBSP_FMKS(PCR, CLKXP, FALLING)         | //Sendedaten werden bei fallender Flanke des Clocks gesendet
            MCBSP_FMKS(PCR, CLKRP, RISING)                //Empfangsdaten werden bei steigender Flanke des Clocks übernommen
    };


    /* Codec configuration settings */ //Werden in aic23 an die Codec-Einheit übermittelt
    DSK6713_AIC23_Config config =
    {
        0x0017, /* 0 DSK6713_AIC23_LEFTINVOL  Left line input channel volume */        //0dB Verstärkung - kein gleichzeitiger Lautstärkeupdate
        0x0017, /* 1 DSK6713_AIC23_RIGHTINVOL Right line input channel volume */    //0dB Verstärkung - kein gleichzeitiger Lautstärkeupdate
        0x01f9, /* 2 DSK6713_AIC23_LEFTHPVOL  Left channel headphone volume */        //gleichzeitiger Lautsärkeupdate - Nulldurchgang erkennen (zero Crossing) - 0dB Verstärkung
        0x01f9, //UNGLEICH /* 3 DSK6713_AIC23_RIGHTHPVOL Right channel headphone volume */        //gleichzeitiger Lautsärkeupdate - Nulldurchgang erkennen (zero Crossing) - 0dB Verstärkung
        0x0011, /* 4 DSK6713_AIC23_ANAPATH    Analog audio path control */            //Mikrofonverstärkung 20dB - DAC ausgewählt
        0x0000, /* 5 DSK6713_AIC23_DIGPATH    Digital audio path control */            //keine Filter aktiviert
        0x0000, /* 6 DSK6713_AIC23_POWERDOWN  Power down control */                    //Alle Komponenten aktiviert
        0x0043, //Geändert von 0x0043 --> 0x0041 /* 7 DSK6713_AIC23_DIGIF      Digital audio interface format */        //AIC23 ist Master, DSP format, frame sync followed by two data words --> MSB first, left aligned
        0x0001, /* 8 DSK6713_AIC23_SAMPLERATE Sample rate control */                //USB Clock Mode, f_s = 250
        0x0001  /* 9 DSK6713_AIC23_DIGACT     Digital interface activation */        //Digital Interface aktiviert
    };

    /* --------------------------- main() function -------------------------- */
    /*
     *  main() - The main user task.  Performs application initialization and
     *           starts the data transfer.
     */
    void main(void)
    {
        int flag1 = 1;
        int flag2 = 1;
        Uint32 counter1 = 0;
        Uint32 counter2 = 0;
        Uint32 counter3 = 0;
        int counter4 = 0;

        Uint8 Frequenzy1[500] =  {... };
        Uint16 Frequenzy2[500] = {...};
        Uint8 Frequenzy3[500] =  {...};

        globalCounter1 = 0;

        //Daten über Polling einlesen
        Uint32 x[0x00000800] = {0};
        Uint32 y;

        /* Initialize Board Support Library */
        DSK6713_init();

        /* Initialize LEDs and DIP switches */
        DSK6713_LED_init();
        DSK6713_DIP_init();

        /* Clear buffers */
        memset((void *) gBufferXmtPing, 0, BUFFSIZE * 4 * 2); //initialisiert den Buffer mit Nullen

        AIC23_setParams(&config); // Configure the codec //Die Funktion AIC23_setParams bekommt die Adresse von config zugewiesen

        initMcbsp(); // Initialize McBSP1 for audio transfers

        /* Do a dummy write to generate the first McBSP transmit event */
        MCBSP_write(hMcbsp1, 0); //necessary to start communication

        IRQ_globalDisable(); // Disable global interrupts during setup

        initEdma(); // Initialize the EDMA controller

        initIrq(); // Initialize interrupts

        IRQ_globalEnable(); // Re-enable global interrupts

        //Sinus via polling output

        while(flag1)
        {
            if(1)
            {
                /* Toggle LED #3 as a visual cue */
                DSK6713_LED_toggle(1);

                if(counter3 < 0x000600000)
                {
                    MCBSP_write(hMcbsp1, Frequenzy1[counter1]);
    //                Microphone[counter1] = MCBSP_read(hMcbsp1); //tried to read the microphone signal
                }
                else if(counter3 > 0x000600000)
                    MCBSP_write(hMcbsp1, Frequenzy3[counter1] && MCBSP_xrdy(hMcbsp1));
                else
                    MCBSP_write(hMcbsp1, Frequenzy1[counter1]);

                counter1++;
                if(counter1==499)
                    counter1 = 0;

                counter3++;

                if(counter2++ >= 0x001000000) //0x100000000
                {
                    flag1 = 0;
                }
            }
        }
    }

    void MCBSP_1_DataReceived()
    {
        int a = 1;
        a++;
    }

    /* ------------------------Helper Functions ----------------------------- */

    /*
     *  initMcbsp() - Initialize the McBSP for codec data transfers using the
     *                configuration define at the top of this file.
     */
    void initMcbsp()
    {
        /* Open the codec data McBSP */
        hMcbsp1 = MCBSP_open(MCBSP_DEV1, MCBSP_OPEN_RESET);        //Handle von McBSP1 erzeugen und resetten

        /* Configure the codec to match the AIC23 data format */
        MCBSP_config(hMcbsp1, &mcbspCfg1);                        //McBSP1 konfigurieren

        /* Start the McBSP running */
        MCBSP_start(
                hMcbsp1,                    //
                MCBSP_XMIT_START |             //Startet Sendevorgang
                MCBSP_RCV_START  |             //Startet Empfangsvorgang
                MCBSP_SRGR_START |             //Startet Sample Rate Generator (GRST)
                MCBSP_SRGR_FRAMESYNC,         //Startet Framesnc. Generation (FRST)
                220                            //SampleRateGenDelay
                );
    }

    /*
     *  initIrq() - Initialize and enable the DMA receive interrupt using the CSL.
     *              The interrupt service routine for this interrupt is edmaHwi.
     */
    void initIrq(void)
    {
        /* Enable EDMA interrupts to the CPU */
        IRQ_clear(IRQ_EVT_EDMAINT); // Clear any pending EDMA interrupts
        IRQ_enable(IRQ_EVT_EDMAINT); // Enable EDMA interrupt
    }

    /*
     *  initEdma() - Initialize the DMA controller.  Use linked transfers to
     *               automatically transition from ping to pong and visa-versa.
     */
    void initEdma(void)
    {
        /* Configure transmit channel */
        hEdmaXmt = EDMA_open(EDMA_CHA_XEVT1, EDMA_OPEN_RESET); // get hEdmaXmt handle and reset channel
        hEdmaReloadXmtPing = EDMA_allocTable(-1); // get hEdmaReloadXmtPing handle
        hEdmaReloadXmtPong = EDMA_allocTable(-1); // get hEdmaReloadXmtPong handle

        gEdmaConfigXmt.dst = MCBSP_getXmtAddr(hMcbsp1); // set the desination address to McBSP1 DXR

        gXmtChan = EDMA_intAlloc(-1); // get an open TCC //Transfer Complete Code
        gEdmaConfigXmt.opt |= EDMA_FMK(OPT,TCC,gXmtChan); // set TCC to gXmtChan

        EDMA_config(hEdmaXmt, &gEdmaConfigXmt); // then configure the registers
        EDMA_config(hEdmaReloadXmtPing, &gEdmaConfigXmt); // and the reload for Ping

        gEdmaConfigXmt.src = EDMA_SRC_OF(gBufferXmtPong); // change the structure to have a source of Pong
        EDMA_config(hEdmaReloadXmtPong, &gEdmaConfigXmt); // and configure the reload for Pong

        EDMA_link(hEdmaXmt, hEdmaReloadXmtPong); // link the regs to Pong
        EDMA_link(hEdmaReloadXmtPong, hEdmaReloadXmtPing); // link Pong to Ping
        EDMA_link(hEdmaReloadXmtPing, hEdmaReloadXmtPong); // and link Ping to Pong

        /* Configure receive channel */
        hEdmaRcv = EDMA_open(EDMA_CHA_REVT1, EDMA_OPEN_RESET); // get hEdmaRcv handle and reset channel
        hEdmaReloadRcvPing = EDMA_allocTable(-1); // get hEdmaReloadRcvPing handle
        hEdmaReloadRcvPong = EDMA_allocTable(-1); // get hEdmaReloadRcvPong handle

        // ------------------ AB HIER McBSP ------------------------------------------------------------------------------------------
        gEdmaConfigRcv.src = MCBSP_getRcvAddr(hMcbsp1); // and the desination address to McBSP1 DXR
        // ------------------ BIS HIER McBSP ------------------------------------------------------------------------------------------

        gRcvChan = EDMA_intAlloc(-1); // get an open TCC //If −1 is used as an argument, the first available TCC number is allocated.
        gEdmaConfigRcv.opt |= EDMA_FMK(OPT,TCC,gRcvChan); // set TCC to gRcvChan

        EDMA_config(hEdmaRcv, &gEdmaConfigRcv); // then configure the registers
        EDMA_config(hEdmaReloadRcvPing, &gEdmaConfigRcv); // and the reload for Ping

        gEdmaConfigRcv.dst = EDMA_DST_OF(gBufferRcvPong); // change the structure to have a destination of Pong
        EDMA_config(hEdmaReloadRcvPong, &gEdmaConfigRcv); // and configure the reload for Pong

        EDMA_link(hEdmaRcv, hEdmaReloadRcvPong); // link the regs to Pong
        EDMA_link(hEdmaReloadRcvPong, hEdmaReloadRcvPing); // link Pong to Ping
        EDMA_link(hEdmaReloadRcvPing, hEdmaReloadRcvPong); // and link Ping to Pong

        /* Enable interrupts in the EDMA controller */
        EDMA_intClear(gXmtChan);
        EDMA_intClear(gRcvChan); // clear any possible spurious interrupts

        EDMA_intEnable(gXmtChan); // enable EDMA interrupts (CIER)
        EDMA_intEnable(gRcvChan); // enable EDMA interrupts (CIER)

        EDMA_enableChannel(hEdmaXmt); // enable EDMA channel
        EDMA_enableChannel(hEdmaRcv); // enable EDMA channel

        // ------------------ AB HIER McBSP ------------------------------------------------------------------------------------------
        /* Do a dummy write to generate the first McBSP transmit event */
        MCBSP_write(hMcbsp1, 0);
        // ------------------ BIS HIER McBSP ------------------------------------------------------------------------------------------
    }

    /*
     *  copyData() - Copy one buffer with length elements to another.
     */
    void copyData(Int16 *inbuf, Int16 *outbuf, Int16 length)
    {
        Int16 i = 0;

        for (i = 0; i < length; i++)
        {
            outbuf[i] = inbuf[i];
        }
    }

    /* ---------------------- Interrupt Service Routines -------------------- */

    /*
     *  edmaHwi() - Interrupt service routine for the DMA transfer.  It is
     *              triggered when a complete DMA receive frame has been
     *              transferred.   The edmaHwi ISR is inserted into the interrupt
     *              vector table at compile time through a setting in the DSP/BIOS
     *              configuration under Scheduling --> HWI --> HWI_INT8.  edmaHwi
     *              uses the DSP/BIOS Dispatcher to save register state and make
     *              sure the ISR co-exists with other DSP/BIOS functions.
     */
    void edmaHwi(void)
    {
        static Uint32 pingOrPong = PING; // Ping-pong state variable
        static Int16 xmtdone = 0, rcvdone = 0;

        /* Check CIPR to see which transfer completed */
        if (EDMA_intTest(gXmtChan))
        {
            EDMA_intClear(gXmtChan);
            xmtdone = 1;
        }
        if (EDMA_intTest(gRcvChan))
        {
            EDMA_intClear(gRcvChan);
            rcvdone = 1;
        }

        /* If both transfers complete, signal processBufferSwi to handle */
        if (xmtdone && rcvdone)
        {
            if (pingOrPong == PING)
            {
                SWI_or(&processBufferSwi, PING);
                pingOrPong = PONG;
            }
            else
            {
                SWI_or(&processBufferSwi, PONG);
                pingOrPong = PING;
            }
            rcvdone = 0;
            xmtdone = 0;
        }
    }


    void mcbspReceive(void)
    {
        globalCounter1++;
    }

    /* ------------------------------- Threads ------------------------------ */

    /*
     *  processBuffer() - Process audio data once it has been received.
     */
    void processBuffer(void)
    {
        Uint32 pingPong;

        /* Get contents of mailbox posted by edmaHwi */
        pingPong = SWI_getmbox();

        /* Copy data from transmit to receive, could process audio here */
        if (pingPong == PING)
        {3426.dsk_app.zip
            /* Toggle LED #3 as a visual cue */
            DSK6713_LED_toggle(3);

            /* Copy receive PING buffer to transmit PING buffer */
            copyData(gBufferRcvPing, gBufferXmtPing, BUFFSIZE);
        }
        else
        {
            /* Toggle LED #2 as a visual cue */
            DSK6713_LED_toggle(2);

            /* Copy receive PONG buffer to transmit PONG buffer */
            copyData(gBufferRcvPong, gBufferXmtPong, BUFFSIZE);
        }
    }

    /*
     *  blinkLED() - Periodic thread (PRD) that toggles LED #0 every 500ms if
     *               DIP switch #0 is depressed.  The thread is configured
     *               in the DSP/BIOS configuration tool under Scheduling -->
     *               PRD --> PRD_blinkLed.  The period is set there at 500
     *               ticks, with each tick corresponding to 1ms in real
     *               time.
     */
    void blinkLED(void)
    {
        /* Toggle LED #0 if DIP switch #0 is off (depressed) */
        if (!DSK6713_DIP_get(0))
            DSK6713_LED_toggle(0);
    }

    /*
     *  load() - PRD that simulates a 20-25% dummy load on a 225MHz 6713 if
     *           DIP switch #1 is depressed.  The thread is configured in
     *           the DSP/BIOS configuration tool under Scheduling --> PRD
     *           PRD_load.  The period is set there at 10 ticks, which each tick
     *           corresponding to 1ms in real time.
     */
    void load(void)
    {
        volatile Uint32 i;

        if (!DSK6713_DIP_get(1))
            for (i = 0; i < 30000; i++)
                ;
    }

    Fullscreen 6862.Quellcode 28_08_13.c Download 
    /*
 *  Copyright 2003 by Spectrum Digital Incorporated.
 *  All rights reserved. Property of Spectrum Digital Incorporated.
 */

/*
 *  ======== dsk_app.c ========
 *
 *  Version 1.00
 *
 *  This example digitally processes audio data from the line input on the
 *  AIC23 codec and plays the result on the line output.  It uses the McBSP
 *  and EDMA to efficiently handle the data transfer without intervention from
 *  the DSP.
 *
 *  Data transfer
 *
 *  Audio data is transferred back and forth from the codec through McBSP2,
 *  a bidirectional serial port.  The EDMA is configured to take every 16-bit
 *  signed audio sample arriving on McBSP1 and store it in a buffer in memory
 *  until it can be processed.  Once it has been processed, the EDMA
 *  controller sends the data back to McBSP1 for transmission.
 *
 *  A second serial port, McBSP0 is used to control/configure the AIC23.  The
 *  codec receives serial commands through McBSP0 that set configuration
 *  parameters such as volume, sample rate and data format.
 *
 *  In addition to basic EDMA transfers, this example uses 2 special
 *  techniques to make audio processing more convenient and efficient:
 *
 *  1)  Ping-pong data buffering in memory
 *  2)  Linked EDMA transfers
 *
 *  Applications with single buffers for receive and transmit data are
 *  very tricky and timing dependent because new data constantly overwrites
 *  the data being transmitted.  Ping-pong buffering is a technique where two
 *  buffers (referred to as the PING buffer and the PONG buffer) are used for
 *  a data transfer instead of only one.  The EDMA is configured to fill the
 *  PING buffer first, then the PONG buffer.  While the PONG buffer is being
 *  filled, the PING buffer can be processed with the knowledge that the
 *  current EDMA transfer won't overwrite it.  This example uses ping-pong
 *  buffers on both transmit and receive ends for a total of four buffers.
 *
 *  The EDMA controller must be configured slightly differently for each
 *  buffer.  When a buffer is filled, the EDMA controller generates an
 *  interrupt.  The interrupt handler must reload the configuration
 *  for the next buffer before the next audio sample arrives.  An EDMA
 *  feature called linked transfers is used to make this event less time
 *  critical.  Each configuration is created in advance and the EDMA
 *  controller automatically links to the next configuration when the
 *  current configuration is finished.  An interrupt is still generated,
 *  but it serves only to signal the DSP that it can process the data.
 *  The only time constraint is that all the audio data must be processed
 *  before the the active buffer fills up, which is much longer than the
 *  time between audio samples.  It is much easier to satisfy real-time
 *  constraints with this implementation.
 *
 *  Program flow
 *
 *  When the program is run, the individual DSP/BIOS modules are initialized
 *  as configured in dsk_app.cdb with the DSP/BIOS configuration tool.  The
 *  main() function is then called as the main user thread.  In this example
 *  main() performs application initialization and starts the EDMA data
 *  transfers.  When main exits, control passes back entirely to DSP/BIOS
 *  which services any interrupts or threads on an as-needed basis.
 *
 *  The edmaHwi() interrupt service routine is called when a buffer has been
 *  filled.  It contains a state variable named pingOrPong that indicates
 *  whether the buffer is a PING or PONG buffer.  dmaHwi switches the buffer
 *  state to the opposite buffer and calls the SWI thread processBuffer to
 *  process the audio data.
 *
 *  Other Functions
 *
 *  The example includes a few other functions that are executed in the
 *  background as examples of the multitasking that DSP/BIOS is capable of:
 *
 *  1)  blinkLED() toggles LED #0 every 500ms if DIP switch #0 is depressed.
 *      It is a periodic thread with a period of 500 ticks.
 *
 *  2)  load() simulates a 20-25% dummy load if DIP switch #1 is depressed.
 *      It represents other computation that may need to be done.  It is a
 *      periodic thread with a period of 10ms.
 *
 *  Please see the 6713 DSK help file under Software/Examples for more
 *  detailed information on this example.
 */

/*
 *  DSP/BIOS is configured using the DSP/BIOS configuration tool.  Settings
 *  for this example are stored in a configuration file called dsk_app.cdb.
 *  At compile time, Code Composer will auto-generate DSP/BIOS related files
 *  based on these settings.  A header file called dsk_appcfg.h contains the
 *  results of the autogeneration and must be included for proper operation.
 *  The name of the file is taken from dsk_app.cdb and adding cfg.h.
 */
#include "dsk_appcfg.h"

/*
 *  These are include files that support interfaces to BIOS and CSL modules
 *  used by the program.
 */
#include <std.h>
#include <swi.h>
#include <log.h>
#include <c6x.h>
#include <csl.h>
#include <csl_edma.h>
#include <csl_irq.h>
#include <csl_mcbsp.h>
#include <math.h>

/*
 *  The 6713 DSK Board Support Library is divided into several modules, each
 *  of which has its own include file.  The file dsk6713.h must be included
 *  in every program that uses the BSL.  This example also uses the
 *  DIP, LED and AIC23 modules.
 */
#include "dsk6713.h"
#include "dsk6713_led.h"
#include "dsk6713_dip.h"
#include "dsk6713_aic23.h"

/* Function prototypes */
void initIrq(void);
void initMcbsp(void);
void initEdma(void);
void copyData(Int16 *inbuf, Int16 *outbuf, Int16 length);
void processBuffer(void);
void edmaHwi(void);
void mcbspReceive(void);
void MCBSP_1_DataReceived(void);

/* Constants for the buffered ping-pong transfer */
#define BUFFSIZE 1000
#define PING 0
#define PONG 1

/*
 * Data buffer declarations - the program uses four logical buffers of size
 * BUFFSIZE, one ping and one pong buffer on both receive and transmit sides.
 */
Int16 gBufferXmtPing[BUFFSIZE]; // Transmit PING buffer
Int16 gBufferXmtPong[BUFFSIZE]; // Transmit PONG buffer

Int16 gBufferRcvPing[BUFFSIZE]; // Receive PING buffer
Int16 gBufferRcvPong[BUFFSIZE]; // Receive PONG buffer

Int32 globalCounter1;

EDMA_Handle hEdmaXmt; // EDMA channel handles
EDMA_Handle hEdmaReloadXmtPing;
EDMA_Handle hEdmaReloadXmtPong;
EDMA_Handle hEdmaRcv;
EDMA_Handle hEdmaReloadRcvPing;
EDMA_Handle hEdmaReloadRcvPong;

MCBSP_Handle hMcbsp1; // McBSP1 (codec data) handle

Int16 gXmtChan; // TCC codes (see initEDMA())
Int16 gRcvChan;

/*
 *  EDMA Config data structure
 */

/* Transmit side EDMA configuration */
EDMA_Config gEdmaConfigXmt =
{ EDMA_FMKS(OPT, PRI, HIGH) | // Priority
		EDMA_FMKS(OPT, ESIZE, 16BIT) | // Element size
		EDMA_FMKS(OPT, 2DS, NO) | // 2 dimensional source?
		EDMA_FMKS(OPT, SUM, INC) | // Src update mode
		EDMA_FMKS(OPT, 2DD, NO) | // 2 dimensional dest
		EDMA_FMKS(OPT, DUM, NONE) | // Dest update mode
		EDMA_FMKS(OPT, TCINT, YES) | // Cause EDMA interrupt?
		EDMA_FMKS(OPT, TCC, OF(0)) | // Transfer complete code
		EDMA_FMKS(OPT, LINK, YES) | // Enable link parameters?
		EDMA_FMKS(OPT, FS, NO), // Use frame sync?

		(Uint32) & gBufferXmtPing, // Src address //Speicherstelle, auf die die EDMA zugreift?

		EDMA_FMK (CNT, FRMCNT, NULL) | // Frame count
				EDMA_FMK (CNT, ELECNT, BUFFSIZE), // Element count

		EDMA_FMKS(DST, DST, OF(0)), // Dest address

		EDMA_FMKS(IDX, FRMIDX, DEFAULT) | // Frame index value
				EDMA_FMKS(IDX, ELEIDX, DEFAULT), // Element index value

		EDMA_FMK (RLD, ELERLD, NULL) | // Reload element
				EDMA_FMK (RLD, LINK, NULL) // Reload link
};

/* Receive side EDMA configuration */
EDMA_Config gEdmaConfigRcv =
{ EDMA_FMKS(OPT, PRI, HIGH) | // Priority
		EDMA_FMKS(OPT, ESIZE, 16BIT) | // Element size
		EDMA_FMKS(OPT, 2DS, NO) | // 2 dimensional source?
		EDMA_FMKS(OPT, SUM, NONE) | // Src update mode
		EDMA_FMKS(OPT, 2DD, NO) | // 2 dimensional dest
		EDMA_FMKS(OPT, DUM, INC) | // Dest update mode
		EDMA_FMKS(OPT, TCINT, YES) | // Cause EDMA interrupt?
		EDMA_FMKS(OPT, TCC, OF(0)) | // Transfer complete code
		EDMA_FMKS(OPT, LINK, YES) | // Enable link parameters?
		EDMA_FMKS(OPT, FS, NO), // Use frame sync?

		EDMA_FMKS(SRC, SRC, OF(0)), // Src address

		EDMA_FMK (CNT, FRMCNT, NULL) | // Frame count
				EDMA_FMK (CNT, ELECNT, BUFFSIZE), // Element count

		(Uint32) & gBufferRcvPing, // Dest address

		EDMA_FMKS(IDX, FRMIDX, DEFAULT) | // Frame index value
				EDMA_FMKS(IDX, ELEIDX, DEFAULT), // Element index value

		EDMA_FMK (RLD, ELERLD, NULL) | // Reload element
				EDMA_FMK (RLD, LINK, NULL) // Reload link
};

/* McBSP codec data channel configuration */
static MCBSP_Config mcbspCfg1 =
{
		MCBSP_FMKS(SPCR, FREE, NO)              | //W�hrend dem stoppen der Emulation stoppt auch die Clock des McBSP
		MCBSP_FMKS(SPCR, SOFT, NO)              | //Beim Stoppen der Emulation (des Debuggens) wird die �bertragung sofort abgebrochen
		MCBSP_FMKS(SPCR, FRST, YES)             | //Frame Synchronisation "is not generated by the sample-rate generator" - ist von anderem Faktor abh�ngig (siehe (SRGR, FSGM, DXR2XSR))
		MCBSP_FMKS(SPCR, GRST, YES)             | //Sample Rate wird zur�ckgesetzt/gel�scht
		MCBSP_FMKS(SPCR, XINTM, XRDY)           | //XINT (Interrupt, der der CPU meldet, das eine �bertragung abgeschlossen ist) wird durch das Bit RRDY ausgel�st
		MCBSP_FMKS(SPCR, XSYNCERR, NO)          | //Synchronisationsfehler wird nicht behandelt
		MCBSP_FMKS(SPCR, XRST, YES)             | //Sender ist eingeschaltet (enabled)
		MCBSP_FMKS(SPCR, DLB, OFF)              | //Digital Loop Back ist ausgeschaltet
		MCBSP_FMKS(SPCR, RJUST, RZF)            | //Im DRR (Data Receive Register) werden die Bits rechtsb�ndig mit Nullen aufgef�llt abgelegt.
		MCBSP_FMKS(SPCR, CLKSTP, DISABLE)		| //Clock l�uft immer
		MCBSP_FMKS(SPCR, DXENA, OFF)            | //DX- Enabler wird nicht verwendet
		MCBSP_FMKS(SPCR, RINTM, RRDY)           | //(Analaog zu XINTM) RINT wird durch das Bit RRDY ausgel�st
		MCBSP_FMKS(SPCR, RSYNCERR, NO)          | //Synchronisationsfehler wird nicht behandelt
		MCBSP_FMKS(SPCR, RRST, YES),			  //Empf�nger ist resettet und ausgeschaltet

												  //RCR Receive control register value
		MCBSP_FMKS(RCR, RPHASE, SINGLE) 		| //Von der Bedeutung her analog zum Transmit control register, nur eben f�r den Empf�ngereingang.
		MCBSP_FMKS(RCR, RFRLEN2, DEFAULT)		|
		MCBSP_FMKS(RCR, RWDLEN2, DEFAULT) 		|
		MCBSP_FMKS(RCR, RCOMPAND, MSB)			|
		MCBSP_FMKS(RCR, RFIG, NO) 				|
		MCBSP_FMKS(RCR, RDATDLY, 0BIT)			|
		MCBSP_FMKS(RCR, RFRLEN1, OF(1)) 		|
		MCBSP_FMKS(RCR, RWDLEN1, 16BIT)			|
		MCBSP_FMKS(RCR, RWDREVRS, DISABLE),

												  //Transmit control register value
		MCBSP_FMKS(XCR, XPHASE, SINGLE)         | //"Single-phase frame" --> alle Frames sind gleich lang. Es gelten nur die Festlegungen f�r Phase 1
		MCBSP_FMKS(XCR, XFRLEN2, DEFAULT)       | //Phase 2: Irrelevant, es wird nur Phase 1 verwendet
		MCBSP_FMKS(XCR, XWDLEN2, DEFAULT)       | //Phase 2: Irrelevant, es wird nur Phase 1 verwendet
		MCBSP_FMKS(XCR, XCOMPAND, MSB)          | //Daten�bertragung startet mit dem MSB
		MCBSP_FMKS(XCR, XFIG, NO)               | //Ein Puls des Framesynchronisationssignals f�hrt zu einem Erneuten starten der �bertragung
		MCBSP_FMKS(XCR, XDATDLY, 0BIT)          | //Delay von 0 Bit
		MCBSP_FMKS(XCR, XFRLEN1, OF(1))         | //Phase 1: Ein Frame besteht aus 2 Datenw�rtern, | //ACHTUNG: "SPRU580E_MCBSP.pdf", Seite 89: XFRLEN1 0-7Fh (XFRLEN1 + 1) specifies the transmit frame length (number of words) in phase 1. --> es werden hier also zwei Frames �bertragen, wie auch in "aic23.pdf", Seite 3-8 im Abschnitt "DSP Mode" beschrieben
		MCBSP_FMKS(XCR, XWDLEN1, 16BIT)         | //Phase 1: Ein Datenwort ist 16 bit lang
		MCBSP_FMKS(XCR, XWDREVRS, DISABLE),		  //Feature disabled

											  	  //Sample rate generator register value
		MCBSP_FMKS(SRGR, GSYNC, DEFAULT) 		| //Registerwerte spielen keine Rolle, da der Takt nicht vom McBSP, sondern vom AIC23 vorgegeben wird.
		MCBSP_FMKS(SRGR, CLKSP, DEFAULT)		|
		MCBSP_FMKS(SRGR, CLKSM, DEFAULT) 		|
		MCBSP_FMKS(SRGR, FSGM, DEFAULT)			|
		MCBSP_FMKS(SRGR, FPER, DEFAULT) 		|
		MCBSP_FMKS(SRGR, FWID, DEFAULT)			|
		MCBSP_FMKS(SRGR, CLKGDV, DEFAULT),


		MCBSP_MCR_DEFAULT,
		MCBSP_RCER_DEFAULT,
		MCBSP_XCER_DEFAULT,


		MCBSP_FMKS(PCR, XIOEN, SP)              | //Die Anschl�sse DX, FSX und CLKX werden f�r den McBSP verwendet und dienen nicht als gew�hnliche I/O-pins.
		MCBSP_FMKS(PCR, RIOEN, SP)              | //Die Anschl�sse DR, FSR, CLKR und CLKS werden f�r den McBSP verwendet und dienen nicht als gew�hnliche I/O-pins.
		MCBSP_FMKS(PCR, FSXM, EXTERNAL) 		| //Rahmensynchronisationssignal kommt von extern (AIC23)
		MCBSP_FMKS(PCR, FSRM, EXTERNAL)			| //Rahmensynchronisationssignal kommt von extern (AIC23)
		MCBSP_FMKS(PCR, CLKXM, INPUT) 			| //Der Pin CLKX ist ein Eingang, der den Clock von extern bekommt.
		MCBSP_FMKS(PCR, CLKRM, INPUT)			| //Der Pin CLKR ist ein Eingang, der den Clock von extern bekommt.
		MCBSP_FMKS(PCR, CLKSSTAT, DEFAULT) 		| //kein gew�hnlicher I/O-pin, deshalb irrelevant
		MCBSP_FMKS(PCR, DXSTAT, DEFAULT)		| //kein gew�hnlicher I/O-pin, deshalb irrelevant
		MCBSP_FMKS(PCR, FSXP, ACTIVEHIGH) 		| //Rahmensynchronisationssignal (Sender) ist aktiv, wenn es "high" ist.
		MCBSP_FMKS(PCR, FSRP, ACTIVEHIGH)		| //Rahmensynchronisationssignal (Empf�nger) ist aktiv, wenn es "high" ist.
		MCBSP_FMKS(PCR, CLKXP, FALLING) 		| //Sendedaten werden bei fallender Flanke des Clocks gesendet
		MCBSP_FMKS(PCR, CLKRP, RISING)		  	  //Empfangsdaten werden bei steigender Flanke des Clocks �bernommen
};


/* Codec configuration settings */ //Werden in aic23 an die Codec-Einheit übermittelt
DSK6713_AIC23_Config config =
{
	0x0017, /* 0 DSK6713_AIC23_LEFTINVOL  Left line input channel volume */		//0dB Verst�rkung - kein gleichzeitiger Lautst�rkeupdate
	0x0017, /* 1 DSK6713_AIC23_RIGHTINVOL Right line input channel volume */	//0dB Verst�rkung - kein gleichzeitiger Lautst�rkeupdate
	0x01f9, /* 2 DSK6713_AIC23_LEFTHPVOL  Left channel headphone volume */		//gleichzeitiger Lauts�rkeupdate - Nulldurchgang erkennen (zero Crossing) - 0dB Verst�rkung
	0x01f9, //UNGLEICH /* 3 DSK6713_AIC23_RIGHTHPVOL Right channel headphone volume */		//gleichzeitiger Lauts�rkeupdate - Nulldurchgang erkennen (zero Crossing) - 0dB Verst�rkung
	0x0011, /* 4 DSK6713_AIC23_ANAPATH    Analog audio path control */			//Mikrofonverst�rkung 20dB - DAC ausgew�hlt
	0x0000, /* 5 DSK6713_AIC23_DIGPATH    Digital audio path control */			//keine Filter aktiviert
	0x0000, /* 6 DSK6713_AIC23_POWERDOWN  Power down control */					//Alle Komponenten aktiviert
	0x0043, //Ge�ndert von 0x0043 --> 0x0041 /* 7 DSK6713_AIC23_DIGIF      Digital audio interface format */		//AIC23 ist Master, DSP format, frame sync followed by two data words --> MSB first, left aligned
	0x0001, /* 8 DSK6713_AIC23_SAMPLERATE Sample rate control */				//USB Clock Mode, f_s = 250
	0x0001  /* 9 DSK6713_AIC23_DIGACT     Digital interface activation */		//Digital Interface aktiviert
};

/* --------------------------- main() function -------------------------- */
/*
 *  main() - The main user task.  Performs application initialization and
 *           starts the data transfer.
 */
void main(void)
{
	int flag1 = 1;
	int flag2 = 1;
	Uint32 counter1 = 0;
	Uint32 counter2 = 0;
	Uint32 counter3 = 0;
	int counter4 = 0;

	Uint8 Frequenzy1[500] =  {0x80 ,0x81 ,0x83 ,0x84 ,0x86 ,0x87 ,0x89 ,0x8b ,0x8c ,0x8e ,0x8f ,0x91 ,0x93 ,0x94 ,0x96 ,0x97 ,0x99 ,0x9a ,0x9c ,0x9e ,0x9f ,0xa1 ,0xa2 ,0xa4 ,0xa5 ,0xa7 ,0xa8 ,0xaa ,0xab ,0xad ,0xae ,0xb0 ,0xb1 ,0xb3 ,0xb4 ,0xb6 ,0xb7 ,0xb8 ,0xba ,0xbb ,0xbd ,0xbe ,0xbf ,0xc1 ,0xc2 ,0xc4 ,0xc5 ,0xc6 ,0xc8 ,0xc9 ,0xca ,0xcb ,0xcd ,0xce ,0xcf ,0xd0 ,0xd2 ,0xd3 ,0xd4 ,0xd5 ,0xd6 ,0xd8 ,0xd9 ,0xda ,0xdb ,0xdc ,0xdd ,0xde ,0xdf ,0xe0 ,0xe1 ,0xe2 ,0xe3 ,0xe4 ,0xe5 ,0xe6 ,0xe7 ,0xe8 ,0xe9 ,0xea ,0xeb ,0xec ,0xec ,0xed ,0xee ,0xef ,0xf0 ,0xf0 ,0xf1 ,0xf2 ,0xf2 ,0xf3 ,0xf4 ,0xf4 ,0xf5 ,0xf6 ,0xf6 ,0xf7 ,0xf7 ,0xf8 ,0xf8 ,0xf9 ,0xf9 ,0xfa ,0xfa ,0xfb ,0xfb ,0xfb ,0xfc ,0xfc ,0xfc ,0xfd ,0xfd ,0xfd ,0xfd ,0xfd ,0xfe ,0xfe ,0xfe ,0xfe ,0xfe ,0xfe ,0xfe ,0xfe ,0xfe ,0xff ,0xfe ,0xfe ,0xfe ,0xfe ,0xfe ,0xfe ,0xfe ,0xfe ,0xfe ,0xfd ,0xfd ,0xfd ,0xfd ,0xfd ,0xfc ,0xfc ,0xfc ,0xfb ,0xfb ,0xfb ,0xfa ,0xfa ,0xf9 ,0xf9 ,0xf8 ,0xf8 ,0xf7 ,0xf7 ,0xf6 ,0xf6 ,0xf5 ,0xf4 ,0xf4 ,0xf3 ,0xf2 ,0xf2 ,0xf1 ,0xf0 ,0xf0 ,0xef ,0xee ,0xed ,0xec ,0xec ,0xeb ,0xea ,0xe9 ,0xe8 ,0xe7 ,0xe6 ,0xe5 ,0xe4 ,0xe3 ,0xe2 ,0xe1 ,0xe0 ,0xdf ,0xde ,0xdd ,0xdc ,0xdb ,0xda ,0xd9 ,0xd8 ,0xd6 ,0xd5 ,0xd4 ,0xd3 ,0xd2 ,0xd0 ,0xcf ,0xce ,0xcd ,0xcb ,0xca ,0xc9 ,0xc8 ,0xc6 ,0xc5 ,0xc4 ,0xc2 ,0xc1 ,0xbf ,0xbe ,0xbd ,0xbb ,0xba ,0xb8 ,0xb7 ,0xb6 ,0xb4 ,0xb3 ,0xb1 ,0xb0 ,0xae ,0xad ,0xab ,0xaa ,0xa8 ,0xa7 ,0xa5 ,0xa4 ,0xa2 ,0xa1 ,0x9f ,0x9e ,0x9c ,0x9a ,0x99 ,0x97 ,0x96 ,0x94 ,0x93 ,0x91 ,0x8f ,0x8e ,0x8c ,0x8b ,0x89 ,0x87 ,0x86 ,0x84 ,0x83 ,0x81 ,0x80 ,0x7e ,0x7c ,0x7b ,0x79 ,0x78 ,0x76 ,0x74 ,0x73 ,0x71 ,0x70 ,0x6e ,0x6c ,0x6b ,0x69 ,0x68 ,0x66 ,0x65 ,0x63 ,0x61 ,0x60 ,0x5e ,0x5d ,0x5b ,0x5a ,0x58 ,0x57 ,0x55 ,0x54 ,0x52 ,0x51 ,0x4f ,0x4e ,0x4c ,0x4b ,0x49 ,0x48 ,0x47 ,0x45 ,0x44 ,0x42 ,0x41 ,0x40 ,0x3e ,0x3d ,0x3b ,0x3a ,0x39 ,0x37 ,0x36 ,0x35 ,0x34 ,0x32 ,0x31 ,0x30 ,0x2f ,0x2d ,0x2c ,0x2b ,0x2a ,0x29 ,0x27 ,0x26 ,0x25 ,0x24 ,0x23 ,0x22 ,0x21 ,0x20 ,0x1f ,0x1e ,0x1d ,0x1c ,0x1b ,0x1a ,0x19 ,0x18 ,0x17 ,0x16 ,0x15 ,0x14 ,0x13 ,0x13 ,0x12 ,0x11 ,0x10 ,0xf ,0xf ,0xe ,0xd ,0xd ,0xc ,0xb ,0xb ,0xa ,0x9 ,0x9 ,0x8 ,0x8 ,0x7 ,0x7 ,0x6 ,0x6 ,0x5 ,0x5 ,0x4 ,0x4 ,0x4 ,0x3 ,0x3 ,0x3 ,0x2 ,0x2 ,0x2 ,0x2 ,0x2 ,0x1 ,0x1 ,0x1 ,0x1 ,0x1 ,0x1 ,0x1 ,0x1 ,0x1 ,0x1 ,0x1 ,0x1 ,0x1 ,0x1 ,0x1 ,0x1 ,0x1 ,0x1 ,0x1 ,0x2 ,0x2 ,0x2 ,0x2 ,0x2 ,0x3 ,0x3 ,0x3 ,0x4 ,0x4 ,0x4 ,0x5 ,0x5 ,0x6 ,0x6 ,0x7 ,0x7 ,0x8 ,0x8 ,0x9 ,0x9 ,0xa ,0xb ,0xb ,0xc ,0xd ,0xd ,0xe ,0xf ,0xf ,0x10 ,0x11 ,0x12 ,0x13 ,0x13 ,0x14 ,0x15 ,0x16 ,0x17 ,0x18 ,0x19 ,0x1a ,0x1b ,0x1c ,0x1d ,0x1e ,0x1f ,0x20 ,0x21 ,0x22 ,0x23 ,0x24 ,0x25 ,0x26 ,0x27 ,0x29 ,0x2a ,0x2b ,0x2c ,0x2d ,0x2f ,0x30 ,0x31 ,0x32 ,0x34 ,0x35 ,0x36 ,0x37 ,0x39 ,0x3a ,0x3b ,0x3d ,0x3e ,0x40 ,0x41 ,0x42 ,0x44 ,0x45 ,0x47 ,0x48 ,0x49 ,0x4b ,0x4c ,0x4e ,0x4f ,0x51 ,0x52 ,0x54 ,0x55 ,0x57 ,0x58 ,0x5a ,0x5b ,0x5d ,0x5e ,0x60 ,0x61 ,0x63 ,0x65 ,0x66 ,0x68 ,0x69 ,0x6b ,0x6c ,0x6e ,0x70 ,0x71 ,0x73 ,0x74 ,0x76 ,0x78 ,0x79 ,0x7b ,0x7c ,0x7c };
	Uint16 Frequenzy2[500] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
	Uint8 Frequenzy3[500] =  {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff};

	globalCounter1 = 0;

	//Daten �ber Polling einlesen
	Uint32 x[0x00000800] = {0};
	Uint32 y;

	/* Initialize Board Support Library */
	DSK6713_init();

	/* Initialize LEDs and DIP switches */
	DSK6713_LED_init();
	DSK6713_DIP_init();

	/* Clear buffers */
	memset((void *) gBufferXmtPing, 0, BUFFSIZE * 4 * 2); //initialisiert den Buffer mit Nullen

	AIC23_setParams(&config); // Configure the codec //Die Funktion AIC23_setParams bekommt die Adresse von config zugewiesen

	initMcbsp(); // Initialize McBSP1 for audio transfers

	/* Do a dummy write to generate the first McBSP transmit event */
	MCBSP_write(hMcbsp1, 0); //necessary to start communication

	IRQ_globalDisable(); // Disable global interrupts during setup

	initEdma(); // Initialize the EDMA controller

	initIrq(); // Initialize interrupts

	IRQ_globalEnable(); // Re-enable global interrupts

	//Sinus via polling output

	while(flag1)
	{
		if(1)
		{
			/* Toggle LED #3 as a visual cue */
			DSK6713_LED_toggle(1);

			if(counter3 < 0x000600000)
			{
				MCBSP_write(hMcbsp1, Frequenzy1[counter1]);
//				Microphone[counter1] = MCBSP_read(hMcbsp1); //tried to read the microphone signal
			}
			else if(counter3 > 0x000600000)
				MCBSP_write(hMcbsp1, Frequenzy3[counter1] && MCBSP_xrdy(hMcbsp1));
			else
				MCBSP_write(hMcbsp1, Frequenzy1[counter1]);

			counter1++;
			if(counter1==499)
				counter1 = 0;

			counter3++;

			if(counter2++ >= 0x001000000) //0x100000000
			{
				flag1 = 0;
			}
		}
	}
}

void MCBSP_1_DataReceived()
{
	int a = 1;
	a++;
}

/* ------------------------Helper Functions ----------------------------- */

/*
 *  initMcbsp() - Initialize the McBSP for codec data transfers using the
 *                configuration define at the top of this file.
 */
void initMcbsp()
{
	/* Open the codec data McBSP */
	hMcbsp1 = MCBSP_open(MCBSP_DEV1, MCBSP_OPEN_RESET);		//Handle von McBSP1 erzeugen und resetten

	/* Configure the codec to match the AIC23 data format */
	MCBSP_config(hMcbsp1, &mcbspCfg1);						//McBSP1 konfigurieren

	/* Start the McBSP running */
	MCBSP_start(
			hMcbsp1,					//
			MCBSP_XMIT_START | 			//Startet Sendevorgang
			MCBSP_RCV_START  | 			//Startet Empfangsvorgang
			MCBSP_SRGR_START | 			//Startet Sample Rate Generator (GRST)
			MCBSP_SRGR_FRAMESYNC, 		//Startet Framesnc. Generation (FRST)
			220							//SampleRateGenDelay
			);
}

/*
 *  initIrq() - Initialize and enable the DMA receive interrupt using the CSL.
 *              The interrupt service routine for this interrupt is edmaHwi.
 */
void initIrq(void)
{
	/* Enable EDMA interrupts to the CPU */
	IRQ_clear(IRQ_EVT_EDMAINT); // Clear any pending EDMA interrupts
	IRQ_enable(IRQ_EVT_EDMAINT); // Enable EDMA interrupt
}

/*
 *  initEdma() - Initialize the DMA controller.  Use linked transfers to
 *               automatically transition from ping to pong and visa-versa.
 */
void initEdma(void)
{
	/* Configure transmit channel */
	hEdmaXmt = EDMA_open(EDMA_CHA_XEVT1, EDMA_OPEN_RESET); // get hEdmaXmt handle and reset channel
	hEdmaReloadXmtPing = EDMA_allocTable(-1); // get hEdmaReloadXmtPing handle
	hEdmaReloadXmtPong = EDMA_allocTable(-1); // get hEdmaReloadXmtPong handle

	gEdmaConfigXmt.dst = MCBSP_getXmtAddr(hMcbsp1); // set the desination address to McBSP1 DXR

	gXmtChan = EDMA_intAlloc(-1); // get an open TCC //Transfer Complete Code
	gEdmaConfigXmt.opt |= EDMA_FMK(OPT,TCC,gXmtChan); // set TCC to gXmtChan

	EDMA_config(hEdmaXmt, &gEdmaConfigXmt); // then configure the registers
	EDMA_config(hEdmaReloadXmtPing, &gEdmaConfigXmt); // and the reload for Ping

	gEdmaConfigXmt.src = EDMA_SRC_OF(gBufferXmtPong); // change the structure to have a source of Pong
	EDMA_config(hEdmaReloadXmtPong, &gEdmaConfigXmt); // and configure the reload for Pong

	EDMA_link(hEdmaXmt, hEdmaReloadXmtPong); // link the regs to Pong
	EDMA_link(hEdmaReloadXmtPong, hEdmaReloadXmtPing); // link Pong to Ping
	EDMA_link(hEdmaReloadXmtPing, hEdmaReloadXmtPong); // and link Ping to Pong

	/* Configure receive channel */
	hEdmaRcv = EDMA_open(EDMA_CHA_REVT1, EDMA_OPEN_RESET); // get hEdmaRcv handle and reset channel
	hEdmaReloadRcvPing = EDMA_allocTable(-1); // get hEdmaReloadRcvPing handle
	hEdmaReloadRcvPong = EDMA_allocTable(-1); // get hEdmaReloadRcvPong handle

	// ------------------ AB HIER McBSP ------------------------------------------------------------------------------------------
	gEdmaConfigRcv.src = MCBSP_getRcvAddr(hMcbsp1); // and the desination address to McBSP1 DXR
	// ------------------ BIS HIER McBSP ------------------------------------------------------------------------------------------

	gRcvChan = EDMA_intAlloc(-1); // get an open TCC //If −1 is used as an argument, the first available TCC number is allocated.
	gEdmaConfigRcv.opt |= EDMA_FMK(OPT,TCC,gRcvChan); // set TCC to gRcvChan

	EDMA_config(hEdmaRcv, &gEdmaConfigRcv); // then configure the registers
	EDMA_config(hEdmaReloadRcvPing, &gEdmaConfigRcv); // and the reload for Ping

	gEdmaConfigRcv.dst = EDMA_DST_OF(gBufferRcvPong); // change the structure to have a destination of Pong
	EDMA_config(hEdmaReloadRcvPong, &gEdmaConfigRcv); // and configure the reload for Pong

	EDMA_link(hEdmaRcv, hEdmaReloadRcvPong); // link the regs to Pong
	EDMA_link(hEdmaReloadRcvPong, hEdmaReloadRcvPing); // link Pong to Ping
	EDMA_link(hEdmaReloadRcvPing, hEdmaReloadRcvPong); // and link Ping to Pong

	/* Enable interrupts in the EDMA controller */
	EDMA_intClear(gXmtChan);
	EDMA_intClear(gRcvChan); // clear any possible spurious interrupts

	EDMA_intEnable(gXmtChan); // enable EDMA interrupts (CIER)
	EDMA_intEnable(gRcvChan); // enable EDMA interrupts (CIER)

	EDMA_enableChannel(hEdmaXmt); // enable EDMA channel
	EDMA_enableChannel(hEdmaRcv); // enable EDMA channel

	// ------------------ AB HIER McBSP ------------------------------------------------------------------------------------------
	/* Do a dummy write to generate the first McBSP transmit event */
	MCBSP_write(hMcbsp1, 0);
	// ------------------ BIS HIER McBSP ------------------------------------------------------------------------------------------
}

/*
 *  copyData() - Copy one buffer with length elements to another.
 */
void copyData(Int16 *inbuf, Int16 *outbuf, Int16 length)
{
	Int16 i = 0;

	for (i = 0; i < length; i++)
	{
		outbuf[i] = inbuf[i];
	}
}

/* ---------------------- Interrupt Service Routines -------------------- */

/*
 *  edmaHwi() - Interrupt service routine for the DMA transfer.  It is
 *              triggered when a complete DMA receive frame has been
 *              transferred.   The edmaHwi ISR is inserted into the interrupt
 *              vector table at compile time through a setting in the DSP/BIOS
 *              configuration under Scheduling --> HWI --> HWI_INT8.  edmaHwi
 *              uses the DSP/BIOS Dispatcher to save register state and make
 *              sure the ISR co-exists with other DSP/BIOS functions.
 */
void edmaHwi(void)
{
	static Uint32 pingOrPong = PING; // Ping-pong state variable
	static Int16 xmtdone = 0, rcvdone = 0;

	/* Check CIPR to see which transfer completed */
	if (EDMA_intTest(gXmtChan))
	{
		EDMA_intClear(gXmtChan);
		xmtdone = 1;
	}
	if (EDMA_intTest(gRcvChan))
	{
		EDMA_intClear(gRcvChan);
		rcvdone = 1;
	}

	/* If both transfers complete, signal processBufferSwi to handle */
	if (xmtdone && rcvdone)
	{
		if (pingOrPong == PING)
		{
			SWI_or(&processBufferSwi, PING);
			pingOrPong = PONG;
		}
		else
		{
			SWI_or(&processBufferSwi, PONG);
			pingOrPong = PING;
		}
		rcvdone = 0;
		xmtdone = 0;
	}
}


void mcbspReceive(void)
{
	globalCounter1++;
}

/* ------------------------------- Threads ------------------------------ */

/*
 *  processBuffer() - Process audio data once it has been received.
 */
void processBuffer(void)
{
	Uint32 pingPong;

	/* Get contents of mailbox posted by edmaHwi */
	pingPong = SWI_getmbox();

	/* Copy data from transmit to receive, could process audio here */
	if (pingPong == PING)
	{
		/* Toggle LED #3 as a visual cue */
		DSK6713_LED_toggle(3);

		/* Copy receive PING buffer to transmit PING buffer */
		copyData(gBufferRcvPing, gBufferXmtPing, BUFFSIZE);
	}
	else
	{
		/* Toggle LED #2 as a visual cue */
		DSK6713_LED_toggle(2);

		/* Copy receive PONG buffer to transmit PONG buffer */
		copyData(gBufferRcvPong, gBufferXmtPong, BUFFSIZE);
	}
}

/*
 *  blinkLED() - Periodic thread (PRD) that toggles LED #0 every 500ms if
 *               DIP switch #0 is depressed.  The thread is configured
 *               in the DSP/BIOS configuration tool under Scheduling -->
 *               PRD --> PRD_blinkLed.  The period is set there at 500
 *               ticks, with each tick corresponding to 1ms in real
 *               time.
 */
void blinkLED(void)
{
	/* Toggle LED #0 if DIP switch #0 is off (depressed) */
	if (!DSK6713_DIP_get(0))
		DSK6713_LED_toggle(0);
}

/*
 *  load() - PRD that simulates a 20-25% dummy load on a 225MHz 6713 if
 *           DIP switch #1 is depressed.  The thread is configured in
 *           the DSP/BIOS configuration tool under Scheduling --> PRD
 *           PRD_load.  The period is set there at 10 ticks, which each tick
 *           corresponding to 1ms in real time.
 */
void load(void)
{
	volatile Uint32 i;

	if (!DSK6713_DIP_get(1))
		for (i = 0; i < 30000; i++)
			;
}

  • 0 in reply to s.moessinger
    Prodigy 90 points

    I got the following solution. I uses neither EDMA nor interrupts. It also doesn't use MCBSP direclty. It uses the functions of the BSL library from Spectrum Digital so I don't see how the McBSP works. But maybe this solution helps . (Complete Project as zip-file apended).

    #include "dsk6713.h"

    #include "dsk6713_led.h"
    #include "dsk6713_dip.h"

    #include "dsk6713_aic23.h"




    DSK6713_AIC23_Config config = { \
        0x0017,  /* 0 DSK6713_AIC23_LEFTINVOL  Left line input channel volume */ \
        0x0017,  /* 1 DSK6713_AIC23_RIGHTINVOL Right line input channel volume */\
        0x01f9,  /* 2 DSK6713_AIC23_LEFTHPVOL  Left channel headphone volume */  \
        0x01f9,  /* 3 DSK6713_AIC23_RIGHTHPVOL Right channel headphone volume */ \
        0x0011,  /* 4 DSK6713_AIC23_ANAPATH    Analog audio path control */      \
        0x0000,  /* 5 DSK6713_AIC23_DIGPATH    Digital audio path control */     \
        0x0000,  /* 6 DSK6713_AIC23_POWERDOWN  Power down control */             \
        0x0043,  /* 7 DSK6713_AIC23_DIGIF      Digital audio interface format */ \
        0x0001,  /* 8 DSK6713_AIC23_SAMPLERATE Sample rate control */            \
        0x0001   /* 9 DSK6713_AIC23_DIGACT     Digital interface activation */   \
    };




    void main()
    {
        DSK6713_AIC23_CodecHandle hCodec;
        Int16 out_l, out_r;
        Uint32 in_l;
        Int16 gain;




        DSK6713_init();




        hCodec = DSK6713_AIC23_openCodec(0,&config);




        DSK6713_AIC23_setFreq(hCodec, DSK6713_AIC23_FREQ_48KHZ);




        while(1)
        {
            if (DSK6713_DIP_get(0) == 0)
            {
                gain = 5;
                DSK6713_LED_on(0);
            }

            if (DSK6713_DIP_get(1) == 0)
            {
                gain = 10;
                DSK6713_LED_on(1);
            }

            if (DSK6713_DIP_get(2) == 0)
            {
                gain = 15;
                DSK6713_LED_on(2);
            }

            if (DSK6713_DIP_get(3) == 0)
            {
                gain = 20;
                DSK6713_LED_on(3);
            }

            if ((DSK6713_DIP_get(0) == 1)
                &
                (DSK6713_DIP_get(1) == 1)
                &
                (DSK6713_DIP_get(2) == 1)
                &
                (DSK6713_DIP_get(3) == 1)
                )
            {
                gain = 1;
                DSK6713_LED_off(0);
                DSK6713_LED_off(1);
                DSK6713_LED_off(2);
                DSK6713_LED_off(3);
            }

            while(!DSK6713_AIC23_read(hCodec,&in_l));

            out_l = gain * in_l;
            out_r = gain * in_l;

            while(!DSK6713_AIC23_write(hCodec,out_l));
            while(!DSK6713_AIC23_write(hCodec,out_r));
        }
    }
    6560.GoldenWire.zip

  • 0 in reply to s.moessinger
    Prodigy 60 points

    Dear Semjon M��ssinger,

    thanx a lot for your help. Unfortunately, the project that you provided is not working with my DSK6713 neither. I save the input values (in_l) into a cyclic vector and the values that I get are just noise: -2,-1,0,1,2,3. The microphone that I am using is of course working on the pc. Nevertheless, I would like to work with interrupts, not with the provided DSK functions.

    I checked all the EDMA registers in the "solution of the lab6" project. The initialisation and configuration of the EDMA is correct and after a bit of time the corresponding EDMA Channel Interrupt Pending Register (CIPR) bits are set CIPR = 0x00000003, but the interrupt routine is not being called.. Does anybody have an idea what it could be happening? Could this be a problem of the CSL version that I am using?

  • 0 in reply to Ilias Trachanas
    Prodigy 90 points

    Have you checked the Interrupt Enable Register and the mapping?

            IRQ_map(IRQ_EVT_EDMAINT,8);
            IRQ_clear(IRQ_EVT_EDMAINT);
            IRQ_enable(IRQ_EVT_EDMAINT);

  • 0 in reply to s.moessinger
    Prodigy 60 points

    Hi Semjon,

    thanx for the hint. I added these three lines in the "initEdma" function and now the interrupt runs, but unfortunately only twice.. The CIER equals 0x00000003. During the first time the CIPR equals 0x00000003. Here the interrupt routine:

    void edmaHwi(void)
    {
        static int rcvDone = 0;
        static int xmtDone = 0;

        /* Check CIPR to see which transfer completed */
        if (EDMA_intTest(gXmtTCC))
        {
            EDMA_intClear(gXmtTCC);
            xmtDone = 1;
        }
        if (EDMA_intTest(gRcvTCC))
        {
            EDMA_intClear(gRcvTCC);
            rcvDone = 1;
        }

        if ( rcvDone && xmtDone ) {
            copyData( gBufRcv, gBufXmt, BUFFSIZE );
            rcvDone = 0;
            xmtDone = 0;
        }
    }

    After the first run of the interrupt the CIPR equals zero (because of the EDMA_intClear(gXmtTCC); and EDMA_intClear(gRcvTCC);). Then the interrupt runs one more time although the CIPR still equals zero. I don't understand this. After the second run nothing happens (no interrupt). Here is the "initEdma" function:

    void initEdma(void)
    {

    hEdmaRcv = EDMA_open(EDMA_CHA_REVT1, EDMA_OPEN_RESET);
    hEdmaReloadRcv = EDMA_allocTable(-1);

    gRcvTCC = EDMA_intAlloc(-1);
    gEdmaConfigRcv.opt |= EDMA_FMK(OPT, TCC, gRcvTCC);

    gEdmaConfigRcv.src = MCBSP_getRcvAddr( hMcbspData );

    EDMA_config(hEdmaRcv, &gEdmaConfigRcv);
    EDMA_config(hEdmaReloadRcv, &gEdmaConfigRcv);

    EDMA_link(hEdmaRcv, hEdmaReloadRcv);
    EDMA_link(hEdmaReloadRcv, hEdmaReloadRcv);


    hEdmaXmt = EDMA_open(EDMA_CHA_XEVT1, EDMA_OPEN_RESET);
    hEdmaReloadXmt = EDMA_allocTable(-1);

    gXmtTCC = EDMA_intAlloc(-1);
    gEdmaConfigXmt.opt |= EDMA_FMK(OPT, TCC, gXmtTCC);

    gEdmaConfigXmt.dst = MCBSP_getXmtAddr( hMcbspData );

    EDMA_config(hEdmaXmt, &gEdmaConfigXmt);
    EDMA_config(hEdmaReloadXmt, &gEdmaConfigXmt);

    EDMA_link(hEdmaXmt, hEdmaReloadXmt);
    EDMA_link(hEdmaReloadXmt, hEdmaReloadXmt);

    EDMA_intHook(gXmtTCC, edmaHwi);
    EDMA_intHook(gRcvTCC, edmaHwi);

    EDMA_intClear(gXmtTCC);
    EDMA_intClear(gRcvTCC);

    EDMA_intEnable(gXmtTCC);
    EDMA_intEnable(gRcvTCC);

    EDMA_enableChannel(hEdmaRcv);
    EDMA_enableChannel(hEdmaXmt);

    IRQ_map(IRQ_EVT_EDMAINT,8);
    IRQ_clear(IRQ_EVT_EDMAINT);
    IRQ_enable(IRQ_EVT_EDMAINT);
    }

    Any ideas what I can still check or what it could be running wrong? I appreciate any help!

  • 0 in reply to Ilias Trachanas
    Prodigy 90 points

    Hello,

    so you've got one step further. That's good.

    My interrupt routine looks the same. I'm not sure what is wrong. I had a similar problem when I migrated my Project from an CCS 3.3 Version to CCS 5. Then I created a completly new project in CCS 5 (no migration!) and it worked. I don't know why. Maybe the .tcf-file was corrupted in my migrated project. I hope that helps.