UART0 on AM335X IDK board

/*
* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ 
*/
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*    notice, this list of conditions and the following disclaimer in the 
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*    distribution.
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*    its contributors may be used to endorse or promote products derived
*    from this software without specific prior written permission.
*
*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
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//MDI:WXS: This file is come from TI sample with a lot of changes.

#include "smxbase.h"
#include "uart.h"
#include "am335x.h"

void UART0ModuleClkConfig(void)
{
    /* Configuring L3 Interface Clocks. */

    /* Writing to MODULEMODE field of CM_PER_L3_CLKCTRL register. */
    CM_PER_L3_CLKCTRL |= 0x2;

    /* Waiting for MODULEMODE field to reflect the written value. */
    while(0x2 != ((CM_PER_L3_CLKCTRL) & 0x3));

    /* Writing to MODULEMODE field of CM_PER_L3_INSTR_CLKCTRL register. */
    (CM_PER_L3_INSTR_CLKCTRL) |= 0x2;

    /* Waiting for MODULEMODE field to reflect the written value. */
    while(0x2 != ((CM_PER_L3_INSTR_CLKCTRL) & 0x3));

    /* Writing to CLKTRCTRL field of CM_PER_L3_CLKSTCTRL register. */
    (CM_PER_L3_CLKSTCTRL) |= 0x2;

    /* Waiting for CLKTRCTRL field to reflect the written value. */
    while(0x2 != ((CM_PER_L3_CLKSTCTRL) & 0x3));

    /* Writing to CLKTRCTRL field of CM_PER_OCPWP_L3_CLKSTCTRL register. */
    (CM_PER_OCPWP_L3_CLKSTCTRL) |= 0x2;

    /*Waiting for CLKTRCTRL field to reflect the written value. */
    while(0x2 != ((CM_PER_OCPWP_L3_CLKSTCTRL) & 0x3));

    /* Writing to CLKTRCTRL field of CM_PER_L3S_CLKSTCTRL register. */
    (CM_PER_L3S_CLKSTCTRL) |= 0x2;

    /*Waiting for CLKTRCTRL field to reflect the written value. */
    while(0x2 != ((CM_PER_L3S_CLKSTCTRL) & 0x3));

    /* Checking fields for necessary values.  */

    /* Waiting for IDLEST field in CM_PER_L3_CLKCTRL register to be set to 0x0. */
    while((0x0)!= ((CM_PER_L3_CLKCTRL) & 0x00030000));

    /*
    ** Waiting for IDLEST field in CM_PER_L3_INSTR_CLKCTRL register to attain the
    ** desired value.
    */
    while((0x0)!=((CM_PER_L3_INSTR_CLKCTRL) & 0x00030000));

    /*
    ** Waiting for CLKACTIVITY_L3_GCLK field in CM_PER_L3_CLKSTCTRL register to
    ** attain the desired value.
    */
    while(0x10 != ((CM_PER_L3_CLKSTCTRL) & 0x10));

    /*
    ** Waiting for CLKACTIVITY_OCPWP_L3_GCLK field in CM_PER_OCPWP_L3_CLKSTCTRL
    ** register to attain the desired value.
    */
    while(0x10 != ((CM_PER_OCPWP_L3_CLKSTCTRL) & 0x10));

    /*
    ** Waiting for CLKACTIVITY_L3S_GCLK field in CM_PER_L3S_CLKSTCTRL register
    ** to attain the desired value.
    */
    while(0x8 != ((CM_PER_L3S_CLKSTCTRL) & 0x8));

    /* Configuring registers related to Wake-Up region. */

    /* Writing to MODULEMODE field of CM_WKUP_CONTROL_CLKCTRL register. */
    (CM_WKUP_CONTROL_CLKCTRL) |= 0x2;

    /* Waiting for MODULEMODE field to reflect the written value. */
    while(0x2 != ((CM_WKUP_CONTROL_CLKCTRL) & 0x3));

    /* Writing to CLKTRCTRL field of CM_PER_L3S_CLKSTCTRL register. */
    (CM_WKUP_CLKSTCTRL) |= 0x2;

    /*Waiting for CLKTRCTRL field to reflect the written value. */
    while(0x2 != ((CM_WKUP_CLKSTCTRL) & 0x3));

    /* Writing to CLKTRCTRL field of CM_L3_AON_CLKSTCTRL register. */
    (CM_L3_AON_CLKSTCTRL) |= 0x2;

    /*Waiting for CLKTRCTRL field to reflect the written value. */
    while(0x2 != ((CM_L3_AON_CLKSTCTRL) & 0x3));

    /* Writing to MODULEMODE field of CM_WKUP_UART0_CLKCTRL register. */
    (CM_WKUP_UART0_CLKCTRL) |= 0x2;

    /* Waiting for MODULEMODE field to reflect the written value. */
    while(0x2 != ((CM_WKUP_UART0_CLKCTRL) & 0x3));

    /* Verifying if the other bits are set to required settings. */

    /*
    ** Waiting for IDLEST field in CM_WKUP_CONTROL_CLKCTRL register to attain
    ** desired value.
    */
    while((0x0) != ((CM_WKUP_CONTROL_CLKCTRL) & 0x00030000));

    /*
    ** Waiting for CLKACTIVITY_L3_AON_GCLK field in CM_L3_AON_CLKSTCTRL
    ** register to attain desired value.
    */
    while(0x8 != ((CM_L3_AON_CLKSTCTRL) & 0x8));

    /*
    ** Waiting for IDLEST field in CM_WKUP_L4WKUP_CLKCTRL register to attain
    ** desired value.
    */
    while((0x0) != ((CM_WKUP_L4WKUP_CLKCTRL) & 0x00030000));

    /*
    ** Waiting for CLKACTIVITY_L4_WKUP_GCLK field in CM_WKUP_CLKSTCTRL register
    ** to attain desired value.
    */
    while(0x4 != ((CM_WKUP_CLKSTCTRL) & 0x4));

    /*
    ** Waiting for CLKACTIVITY_L4_WKUP_AON_GCLK field in CM_L4_WKUP_AON_CLKSTCTRL
    ** register to attain desired value.
    */
    while(0x4 != ((CM_L4_WKUP_AON_CLKSTCTRL) & 0x4));

    /*
    ** Waiting for CLKACTIVITY_UART0_GFCLK field in CM_WKUP_CLKSTCTRL
    ** register to attain desired value.
    */
    while(0x00001000u != ((CM_WKUP_CLKSTCTRL) & 0x00001000));

    /*
    ** Waiting for IDLEST field in CM_WKUP_UART0_CLKCTRL register to attain
    ** desired value.
    */
    while((0x0) != ((CM_WKUP_UART0_CLKCTRL) & 0x00030000));
}

void Uart0Init(u32 baud)
{
   u32 divisor;

   /* Configuring the system clocks for UART0 instance. */
   UART0ModuleClkConfig();

   /* Set pins multiplexing for UART0 */
   /* RX pin: receiver enabled and pullup selected */
   CONF_UART0_RXD = 0x28;
   /* TX pin: pullup selected */
   CONF_UART0_TXD = 0x8;

   /* Set software reset for UART0 */
   UART0_SYSC |= 0x2;

   /* Wait until the software reset is done. */
   while(!(UART0_SYSS & 0x1)) {}

   /* Switch to configuration mode B */
   UART0_LCR = 0xBF;

   /* Enables writing to enhanced function bits in IER, FCR, and MCR */
   UART0_EFR |= 0x10;

   /* Switch to configuration mode A */
   UART0_LCR = 0x80;

   /* Enable access to TCR and TLR */
   UART0_MCR |= 0x40;

   /* Set baud rate...assumes default 16x oversampling */
   divisor = UART_CLOCK / (baud * 16);
   UART0_DLH = (divisor & 0x0000FF00) >> 8;
   UART0_DLL = divisor & 0x000000FF;
   
   /* Enable xmtr/rcvr fifos */
   UART0_FCR = 0x0;
   UART0_FCR = 0xF;

   /* Switch to operational mode */
   UART0_LCR = 0x0;

   /* disable interrupts, flow control, and loop back */
   UART0_IER = 0x0;
   UART0_MCR = 0x0;
   UART0_TLR = 0x0;

   /* Config LCR for no parity, one stop bit, 8 data bits, no flow control */
   UART0_LCR = 0x3;

   /* Change mode from disabled to uart 16x */
   UART0_MDR1 = 0x0;
}

void Uart0PutChar(unsigned char chr)
{
   /* Waiting untill the FIFO is not full */
   while (UART0_SSR & 0x1) {}

   /* Send the character */
   UART0_THR = chr;
      
}

unsigned char Uart0GetChar(void)
{
   unsigned char chr = 0;

   /* Waiting untill char available */
   //while (!(UART0_LSR & 0x1)) {}

   /* receive character */
   chr = UART0_RHR;
   return chr;
}