6455 SRIO speed

Kotor,

If I understand correctly, you are measuring latency which includes command and doorbell delays and possibly interrupt-handling delay differences. Your method is good, but to understand bandwidth, you will need to expand your measurements.

Try sending the data 1, 2, 3, 4 times after the GPIO is set and compare the delays in those cases. Then try increasing or decreasing the data transfer size by 2x for those same tests and compare the delays. These differences will give you a better idea of the time it takes to send the data and take out some of the transmission overhead.

Also keep in mind that this will depend on how you send the multiple data transfers. It will be best to use different LSUs and start all of the transfers as quickly as possible without waiting for the previous one to complete.

Regards,
RandyP

Hi, RandyP!

I want to thank you a lot for your answers to other people in old forum threads about SRIO and EDMA. I find it very useful.

English isn’t my first language, so please excuse any mistakes.

I tested the communication speed between two tms320c6455 processors using RapidIO 4 KB NWRITE/SWRITE transactions. The results are good for my tasks.
Now I want to use EDMA for SRIO transfer.
After researching edma example from diolib, I've a question about interrupt and synchronization.
How I understood, after each succesfull transfer of one LSU register's block using edma, lsu_isr interrupt hook is get called. There INTDST_RATE_CNTL register is update. But then following code from the sample works uncorrect:

 t1 = COM_startChrono();
// API under test - Perform DIO write
if (testObjTab[testIndex].raw_lsu_setup)
DIO_rawEdmaLsuSetup (&srioObj,hPreConfiglsuRegs[testIndex],numLsuCmds,testObjTab[testIndex].sNum);
else
cslStatus = DIO_streamingReq(&writeReqObj[testIndex],&srioObj,testObjTab[testIndex].sNum);
// Wait for EDMA interruption
asm(" IDLE");
t2 = COM_stopChrono();

So, after transfer of LSU register's first block (not all) command asm(" IDLE") will interrupted and in t2 will written wrong time value. Am I wrong or is it really so?

I had carefully checked the code from testdio_edmastreamlsu example of diolib library. From there I found out that interrupts after succesful sending of 4kb block are disabled. But, I still wonder how the register INTDST_RATE_CNTL would be refreshed. Documentation tells that new value should be put there after each RIOINT call. When transaction is completed I should clean LSU_ICSR reg and set INTDST_RATE_CNTL register. 

PS: Also, i have noticed that in DIO_rawEdmaLsuSetup function there are two chaining edma channels that are needed for updating of intdst_rate_cnt and lsu_iccr. But I can not find the place where they are triggered...

Seb Tomas!

Thank you very much! You are fully answer my question!

PS: my speed test result - 2.1 Gbps payload (1x config)