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AM335x gpmc_ben1/gpmc_dir setup in linux

argeebee
Intellectual 835 points
Other Parts Discussed in Thread: AM3354

I'm customizing the pinmux setup for our board which uses an AM3354 and came across a mystery.  In datasheet SPRS717D, pg 26, GPMC_BEn1 shows gpmc_dir selectable with mode 4.  However, arch/arm/mach-opmap2/mux33xx.c shows:

    _AM33XX_MUXENTRY(GPMC_BEN1, 0,  "gpmc_ben1", "mii2_col", NULL, "mmc2_dat3",  NULL, NULL, "mcasp0_aclkr", "gpio1_28"),

SPRS717D lists all 8 possible modes, but mux33xx.c doesn't define modes 2, 4, and 5.  The mode I want, mode 4/gmpc_dir is not listed.  My kernel is based on linux-3.2.0-psp04.06.00.10.  Why aren't all the modes listed?  Are there any side-effects if I add gmpc_dir to the _AM33XX_MUXENTRY(GPMC_BEN1?

Also, while using the pinmux utility, I noticed that selecting GPMC_CSN2/GPMC_CSN2 along with GPMC_BEN1/GPMC_DIR causes an IO violation.  As a workaround, I am using GPMC_CSN3 instead.  I didn't notice anything in the spec  why this combination is illegal, so I am curious why.



  • 0
    TI__Guru 62855 points

    You must use the pin mux tool to select valid pin multiplexing options known as IO Sets.

    Read the first two paragraphs of Section 5 in the Data Sheet to understand why there are pre-defined valid IO Sets.

    Regards,
    Paul

     

  • 0 in reply to peaves
    Intellectual 835 points

    With a proper IO set selected, there are no IO violations.  The pinmux utility generated:

    MUX_VAL(CONTROL_PADCONF_GPMC_BEN1, (IEN | PU | MODE4 )) /* GPMC_DIR */\

    However, the mux33xx.c entry for GPMC_BEN1 doesn't list GPM_DIR in its mode list. 

    Mode SPRS717D, pg 26 mux33xx.c
    0 gpmc_ben1 gpmc_ben1
    1 gmii2_col mii2_col
    2 gpmc_csn6 NULL
    3 mmc2_dat3 mmc2_dat3
    4 gpmc_dir NULL
    5 pr1_mii1_rxlink NULL
    6 mcasp0_aclkr mcasp0_aclkr
    7 gpio1_28 gpio1_28

    I need the GPMC direction signal for the GPMC bus.  According to SPRS717D, pg 26, this is mode 4, but this mode is marked NULL in mux33xx.c.  So I can think of 2 possible scenarios:

    1) Not implemented - valid configuration is possible, but kernel support was not added

    2) Not valid - not added in kernel because it doesn't work

    Basically, I want to know if I can configure GPMC_BEN1 as GPM_DIR and it will work as expected.  If needed, I will just write directly to the GPMC_BEN1 address instead of going through the setup_pin_mux() API to configure it.

  • 0 in reply to argeebee
    TI__Guru 62855 points

    If you are using valid IO Sets there should not be a problem using the GPMC_DIR signal function because design closed timing on all valid IO Sets.

    I can not say why this pin function is not included in the mux33xx.c file.  Maybe the person that generated that file never had a hardware platform that used this mode so they never added it since it could not be tested.

    Regards,
    Paul

  • 0 in reply to peaves
    Intellectual 835 points

    Ok, that makes sense.  An attempt to read the GPMC configX registers reported that the GPMC is not initialized on the GP EVM.  I modified mux33xx.c to include gpmc_dir and verified with debugfs that GPMC_BEN1 can be set to Mode 4.  Thanks for the replies.