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TMS320C6678 Hyperlink receiver

Bruno B
Expert 1290 points
Other Parts Discussed in Thread: TMS320C6678

Hi,

I have some questions about Hyperlink that we intend to use at 10Gb/s between two TMS320C6678 on the same board.

1) Do you confirm that we can connect Tx to Rx without the serial capacitors ?

2) I could not find in the T.I documents any mask compliancy for the receiver side. Is it possible to get this information ? at 10Gbs , and also for the lower rates ? What is the receiver sensitivity versus frequency ?

Thank you for your help,

With best regards,

Bruno



  • 0
    TI__Mastermind 42545 points

    Hi Bruno,

    For question 1, the Hyperlink can be connected without serial capacitors when connecting from one KSI processor to a second KSI processor. Connecting through capacitors is also acceptable. There is a register setting to define whether AC coupling is present.

    I'll check on question 2 and get you an answer as soon as possible.

    Regards, Bill

  • 0 in reply to Bill Taboada
    Prodigy 25 points

    Hi,

    I am using Hyperlink interface on the TCI6638 kEYSTONE II device.Here are my questions.

    1) Is it necessary to use AC coupling capacitors ( For Tx lines from the processor to the Hyperlink connector ) for keystone ii device.( i am using the Hyperlink lines from EVM board on to my daughter card )

    2) Can the hyperlink Lanes be reversed . ( between a pair and within pairs ).If so which lanes can be interchanged ?.( i am using 4 lanes between the processor and Hyperlink connector.)

    Is there any document which explains it in brief ? 

    3) Is the series termination on the clock signals necessary ?

    Regards,

    Suresh bk

  • 0 in reply to suresh BK
    TI__Mastermind 42545 points

    1) For KeyStone II the AC coupling capacitors are required.

    2) The polarity of a lane can be reversed and lanes can be interchanged. Interchanging means that the TX P/N from one lane can be connected to the RX P/N of a different lane. The P/N of a lane must always be routed as a pair. For single lane operation you must connect Lane 0 of one device to lane 0 of the other device.

    3) The HyperLink reference clock inputs have internal AC coupling capacitors and the receiver is self biasing. If you are using an LVDS clock driver then no external coupling capacitors or termination resistors are needed by the receiver. Some clock drivers require external components on the driver side of the AC coupling capacitors. You should check the data manual for your clock driver to see if these are needed. 

    You mentioned that you are connecting the Hyperlink through a connector to a daughtercard. Note that HyperLink is a high speed SerDes interface intended for connecting two devices on the same PCB. The interface is designed for PCB connections of four inches or less for full speed operation. If you are connecting to a daughtercard you should ensure that you select a connector designed for high speed signals and that you simulate the link. Even with these precautions the Hyperlink interface will likely not operate at the highest speeds possible.

    Regards, Bill