Hello,
I'm having an issue using the AMUTEIN pin to trigger a CPU interrupt on the C6720. Here's my procedure for setting this up, am I doing something wrong ?
1. I assign 0x00000007 to CFGMCASP0, which sets up pin 105(#SPI0_ENA/I2C1_SDA) on the C6720 to act as AMUTEIN for the McASP0 peripheral. I have a digital output pin from a PIC microcontroller connected to pin 105 of the C6720.
2. I write 0x00020007 to address 0x6100 8068, which is { MAX0 (HiMAX) Event Entry Table (0x6100 8000) + (0x68) MCASP0ERR (entry 26 offset)}
--> The step above is supposed to configure the dMAX such that when event 26 occurs it triggers INT9 on the CPU. At this point in time, bit 0 and bit 1 in the CSR are both high... those are the PGIE and GIE bits. In addition IER is configured to have all interrupts on, it has a value 0xFFF3.
3. I write 0x04000000 to DEPR to make event 26 rising edge sensitive.
4. I write 0x04000000 to DEHPR to make event 26 a high priority event.
5. I write 0x04000000 to DEER to enable event 26.
6. I trigger an interrupt with my PIC processor. I saw the signal transition from low to high with my oscilloscope.
7. INT 9 does not execute !!!
8. So I then I verify that I can indeed execute the code in INT 9, so I trigger it manually writing a '1' to the corresponding bit in the IFR register. I PROVED THAT THE INTERRUPT SERVICE ROUTINE EXECUTED !
9. So then I turn off event 26 in DEER by clearing bit 26.
10. I then try to see if the corresponding bit in the DEFR register gets set for event 26 when I transition pin 105 from low to high. And what do you know... IT DOES !!! I clear it then trigger it again, it seems to be working A OK !!
11. SO THEN MY QUESTION IS .... why doesn't my ISR code for INT 9 not execute when I enable event 26 ?
I've tried everything possible to figure out what the problem was. I verified I was writing to the right memory locations. I verified the event entry for entry 26 on HI_MAX, I read back the memory contents and got back what I wrote. I verified all of the values I wrote to the corresponding registers. I verified that my INT 9 ISR could execute.
I've read the dMAX guide thoroughly, I'm pretty sure I'm not missing anything. I'm seeing the event get flagged in the DEFR register, however it's not triggering my INT 9 ISR when I turn the event on in the DEER register, which leads me to believe that there could possibly be an issue with the documentation in either the C6720 manual on the page where it shows the memory map of the device. The HI_MAX event entry address could possibly be wrong or the event entry format for triggering CPU interrupts listed in the dMAX guide could be wrong, or it could be that I'm making a mistake and I'm not realizing it.
I would really appreciate any type of help with this issue as I have hit a brick wall with this problem and I can't make any further progress in trying to debug it.
Thank you any help efforts,
Julxhino
