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SYS/BIOS C28x/Boot Boot/Startup Options Don't Change PLL

Other Parts Discussed in Thread: CONTROLSUITE

I am trying to set the PLL to a proper, specified clock frequency.  I have a F28335 with an external 32 MHz crystal.  I'm hoping to use a ratio of 9/2 to get 144 MHz.  However, the program is defaulting to 10/2 resulting in an above-maximum clock rate of 160 MHz.  I'm confirming this speed by checking the frequency of a PWM with period 1500.  I'm getting an output period of 53.2 kHz (160 MHz / 2 / 1500) instead of 44 kHz (144 MHz / 2 / 1500).  Even if I radically change the PLL constants to much lower values, the PWM frequency remains rock solid at 53.2 kHz.

I have observed the PLLCR [DIV] value still being 0xA and PLLSTS being 0x2 when pausing the program for additional confirmation.

Also, I have tried doing a clean build after saving the SYS/BIOS CFG file.

My settings are shown in this figure:

The relevant part of the CFG script is:

Boot.configurePll = true;
Boot.bootFromFlash = true;
Boot.pllOSCCLK = 32;
BIOS.cpuFreq.lo = 144000000;
Boot.pllcrDIV = 9;

According to SYS/BIOS for the C28x wiki page, the F28335 should be configurable this way.  My steps match the wiki and this other thread.  What am I missing?

CCS: 5.4.0.00091

SYS/BIOS: 6.35.1.29

  • You should be using the 'ti.catalog.c2800.concertoInit.Boot' module rather than the 'ti.catalog.c2800.init.Boot' module.

    Alan

  • A colleague of mine pointed out that I'd given you bad advice. You are correct in using the 'ti.catalog.c2800.init.Boot' module.

    We're wondering if there may be some ControlSuite code being executed within main() that might be overriding the Boot module's PLL settings.

    The suggestion is to check the PLL settings at the start of main(), and then again just before BIOS_start(). There should be no change.

    Alan

  • Regardless, the Limp mode function will only be called if there's something wrong with clocking, right?  I thought it just did an abort by default?

    I had that same idea late yesterday and when I reset the processor, I was getting PLLCR[DIV] = 9 as specified in the CFG file, but I did have some controlSUITE code before that.  When I stepped through a function that modified the PLL, it changed the value back to 10.  I thought for sure that must be the problem!

    However, I've removed all the incompatible controlSUITE code this morning.  I'm stepping through to where my PWM's get started and the idle while loop I've made to test the PWM's.  The PWM frequency still hasn't changed; it's as if it's still being clocked at old PLL ratio of 10/2 instead of 9/2.  When I step through the code, PLLCR[DIV] is holding steady at 9 and when I run the idle loop for a bit to check the PWM frequency and then pause the program, the PLLCR[DIV] is still 9.

    So now it looks like my PLL ratio is staying at 9/2, not being overwritten, but my PWM frequencies still act like the PLL is at 10/2 ratio.  I don't know how this can be.

    I'll note that I'm not actually running BIOS_start() yet, but that shouldn't matter since the Boot module is run before main(), right?

  • Ugh, nevermind, ignore that!

    I was looking at my oscilloscope cursor frequency display and not the frequency measurement.  The PWM did in fact change frequency as expected, it was the controlSUITE function overwriting the PLL that was the problem! 

    Thanks!