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REG Configuration of UART5 for AM335x

Shradhanand Mahendraker
Intellectual 580 points

HI,

Im presently configuring UART5 for my custom board. i have configured everything gpio's and clock and everything(memory map and everything). im trying to bring up uart5, but i could not do it. i could see THR and RHR registers. but could not write anything into it (debugged till the register level). im trying to write 'U' characters continuosly. but not able to write the register THR. The same thing happens when im trying to read from serial terminal. im configuring the pin mux as 

HWREG( SOC_CONTROL_REGS + UART_RX_PAD_CHANNEL_5 ) =   // UART_RX_PAD_CHANNEL_5 =                                                                                                                                                    // GPIO_PAD_U2 //and UART_TX_PAD_CHANNEL_5 = GPIO_PAD_U1
(UART_RX_PAD_CONF_PULLUP_RXACTIVE_FASTCTRL | GPIO_PAD_MODE_7);  //GPIO_PAD_MODE_7 = 7
// UART5_TX config
// Write to UART5 TX PAD Register
HWREG( SOC_CONTROL_REGS + UART_TX_PAD_CHANNEL_5 ) = 
(UART_TX_PAD_CONF_PULLUP_FASTCTRL | GPIO_PAD_MODE_7);  (also tried various modes from 0 to 7)

Other point which i noticed (see below) is that, there is a infinite looping at 2nd while,  and byteTx which is my character is not able to write to THR. i tried writing through debugger, but it looks read-only. 

while((UART_LSR_TX_SR_E | UART_LSR_TX_FIFO_E) !=
(HWREG(baseAdd + UART_LSR) & (UART_LSR_TX_SR_E | UART_LSR_TX_FIFO_E)));

HWREG(baseAdd + UART_THR) = byteTx;
// SR-Am335x Temp change only


while((UART_LSR_TX_SR_E | UART_LSR_TX_FIFO_E) !=
(HWREG(baseAdd + UART_LSR) & (UART_LSR_TX_SR_E | UART_LSR_TX_FIFO_E)));

Could any please help me out of this issue.

Regards,

M.Shradhanand

 

  • 0
    TI__Intellectual 1845 points

    Hi Shradhanand,

    I could not understand the  control config registers for uart0 you have listed in your post

    "HWREG( SOC_CONTROL_REGS + UART_RX_PIN_CHANNEL_0 ) = 0x2D;
    // (UART_RX_PAD_CONF_PULLUP_RXACTIVE_FASTCTRL | GPIO_PAD_MODE_5);
    // UART0_TX config
    // Write to UART0 TX PAD Register
    HWREG( SOC_CONTROL_REGS + UART_TX_PIN_CHANNEL_0 ) = 0xD"
    Can you provide more details on this??

    Are you sure you have done the correct PinMux settings for bringing out UART5?
    On the GPEVM AM335x board the UART5 Tx and Rx pins are brought out on the
    MDIO_CLK and MDIO_DATA pins respectively.

    You can set the MuxMode, Pullup-Pulldown values for Tx and Rx pins in the following
    control module registers conf_mdio(Offset 948h) and conf_mdc(Offset 94ch) respectively.

    You can refer UARTPinMuxSetup function within the platform folder of starterware
    package which does the pinMux for UART0. i.e. platform/<evm>/uart.c

    Hope this helps.

    Regards
    Anant Pai