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MPC to protect DDR

Luís Filipe Mendes
Prodigy 50 points

I have a project (OMAP L138) that uses the DSP and ARM simultaneous.The DDR is shared by both processors and protected by MPU.

It is also possible to configure the MPC module in the DSP BIOS to prevent possible DSP writing on the ARM DDR?

Something like that:

// DDR: 128 MB = 96 MB (ARM) + 32 MB (DSP)

MPC_setBufferPA((Ptr)0xC0000000, 0x06000000, 0, 0);

  • 0
    TI__Mastermind 35645 points

    Hi Luis,

    Thanks for your post.

    I understand that, you are able to configure the MPC module in the DSP BIOS to prevent DSP writing on the ARM DDR. Do you need any confirmation from our side that your configuration was appropriate? else, any exception triggered with reference to memory access violation? Could you please put up your query appropriate so that, it would be easy for us to address your issues precisely?

    If i assume that, you need guidance in configuring the MPC module in the DSP BIOS .tcf file for protecting the L1D, L1P cache/RAM and L2 cache/RAM, you can refer the below wiki for reference:

    http://processors.wiki.ti.com/index.php/Cache_Protection_With_the_DSP/BIOS_MPC_Module#References

    Also, there are some API's available to set the permission attributes and CPU privilege mode of MPC module in DSP BIOS and if you need guidance on the same, please refer the below C6000 DSP BIOS 5.x API reference guide, in which you can see Section 2.18 for better understanding on CPU privilege levels, permission structure etc.

    http://www.ti.com/lit/ug/spru403s/spru403s.pdf

    Else, if you want to debug any illegal memory access exceptions triggered, refer to the "Execution Graph Details" LOG window of DSP/BIOS. The default exception handler for MPC prints out relevant information about all registers and stack contents at the time of the violation.

    In general, to enable the MPC, please check the check-box in the following DSP/BIOS .tcf-file location:

    System -> MEM - Memory Section Manager Properties -> tab "General" -> check "Enable Memory Protection Controller module"

    Also, please refer the below E2E thread for your reference:

    http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/t/30317.aspx

    Thanks & regards,

    Sivaraj K

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  • 0 in reply to Sivaraj Kuppuraj
    Prodigy 190 points

    Hi Sivaraj

    http://www.ti.com/lit/ug/spru403s/spru403s.pdf

    document on pages from 254 to 260 describes different API functions of MPC module in DSP BIOS 5.x In each of MPC module function descriptions there is a statement telling that the functions are only supported for C64x+ devices. OMAPL-138 contains C674x DSP core. Can you confirm/clarify if DSPBIOS 5.41.03.17 MPC module functions are supported on OMAPL-138 please?

    Also, can you tell me which part of memory protection system in OMAPL-138 is used to provide the protection? Is it MPU0/MPU1 or L1D/L1P/L2 or both?

    Best regards,

    Adam Turowski