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DSP/BIOS SWI's and Clock Rate

All:

I have been advised to take the  DSP/BIOS System clock from 1 milliseconds to 10 milliseconds or even higher.

1. Does this have any detremental affect on SWI processing? Task processing?

2. Are there any other detremental affects?

We do have 2 PRD's, and they are clocked at a very slow rate - 1 second. So, it would appear that I could take my DSP/BIOS System Clock to as high as 25 milliseconds or more. I just need to know if there are any inherent problems by doing so...

BTW, we are running DSP/BIOS 5.42.01.49 on C5505, running at 131 MHz.

This is configured under CCS 5.4 and CGT 4.4.1

 

  • Todd,

    There are no BIOS requirements for the nominal 1ms System clock tick period.

    Just remember that the units for all system timeouts are in clock tick periods.

    So, a SEM_pend() call with a timeout of 10 will timeout in 100ms with a tick period of 10ms.

    Alan

  • If I changed the DSP/BIOS System Clock from 1 millisecond to 25 milliseconds, and also changed the dependent system timeouts, would it result in a significant CPU loading difference?

    I guess the granularity of the System Clock should be in relation to the PRDs and things like SEM_pend() that would use it.

  • Todd,

    I don't know the actual load numbers for DSP/BIOS configured with a 1ms CLK tick but I suspect it is very low (ie less than 1%) for a null application (ie one with no CLK or PRD objects to service). Obviously, the number of CLK and PRD objects plus the work done by their respective fxns will determine the performance benefit gained by calling them 1/25 as often.

    Alan