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QDMA linking and interrupts in EDMA3 module on C6678

Scott Tancock
Prodigy 60 points

Hi,

I'm using the QDMA module on the C6678 with linking, and I want to run a callback function after each transfer is complete.  However, only the very first transfer is triggering the callback function I have registered, any subsequent linked transfers do not trigger the callback function, even though they complete and link properly.  Does anybody know why?

Some details:

EDMA channel numbers:

EDMA3_DRV_QDMA_CHANNEL_ANY for first channel

EDMA3_DRV_LINK_CHANNEL or EDMA3_DRV_LINK_CHANNEL_WITH_TCC for subsequent channels (all are the same, doesn't matter which I use

EDMA3_DRV_TCC_ANY for the interrupt channel.  Same channel is being used for all transfers, and if I try to use multiple TCC channels (by having multiple variables set to EDMA3_DRV_TCC_ANY), then an error code is returned when it tries to request the link channel

EDMA settings:

acnt: size of the buffer I am trying to copy

bcnt: 1

ccnt: 1

mode: EDMA3_DRV_ADDR_MODE_INCR

TCINTEN: 1

ITCINTEN: 1

TCCHEN: 0

ITCCHEN: 0

STATIC: 0 for all but very last transfer, which is 1

TCCMODE: 0

srcbidx/srccidx/dstbidx/dstcidx: 0

The above is true for all channels

QDMA trigger word: ccnt

  • 0
    TI__Genius 12065 points

    Please take a look at section "2.9 EDMA3 Interrupts" in EDMA user guide.

    There is only one global completion interrupt for all DMA/QDMA channels. And the EDMA3CC will only assert 

    additional completion interrupts when all IPR/IPRH bits are cleared (section 2.9.2), no matter you are using linking (one channel, multiple parameter sets) or chaining (multiple channels, multiple parameter sets).

    It is possible that those IPR/IPRH bits or CIC interrupt flags are not being cleared in ISR before the subsequent interrupts are requested in your application. Please take a look at the EDMA interrupt section again, especially the interrupt servicing examples in section 2.9.2 to see if you could use other mechanism in your application.