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GPMC Config5 register

Customer: Adtran

I’m working on getting the AM335x to talk to the host processor interface on a chipset connected via the GPMC.

 I’ve got it working somewhat, but I had some questions in regards to the GPMC_CONFIG5_i register.

 If the device is single-access mode (i.e. no burst access), can I safely set PAGEBURSTACCESSTIME to 0?

  • I have defined the on/off times for the !CS, !OE and !WR signals in Config2 and Config4. What effect do the RDACCESSTIME, WRCYCLETIME and RDCYCLETIME values in Config5 have?