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gpt_1 dsl sample on usbstick 5505 dsl memory model problem

MartinPotts
Expert 1190 points

Hope I get a Christmas present, the turkey did not answer my problem.

Made the change as suggested in post under gpt_1 add interrupt to the ISR module.

That was the only change to the .c code.

Compiles ok but will not link. conflict in memory model.

I have tried all options in build properties run time but no change.  

If more infon is needed I can supply.

Please help.

Martin Potts

**** Build of configuration Release for project gpt_21 ****

C:\Program Files\Texas Instruments\CCSv4\utils\gmake\gmake -k all

'Building target: gpt_21.out'

'Invoking: C5500 Linker'

"C:/Program Files/Texas Instruments/CCSv4/tools/compiler/c5500/bin/cl55" -z -m"gpt_21.map" --warn_sections -i"C:/Program Files/Texas Instruments/CCSv4/tools/compiler/c5500/lib" -i"C:/Program Files/Texas Instruments/CCSv4/tools/compiler/c5500/include" -i"C:/Program Files/TMS320VC55XCSL-LOWPWR/VC5505_CSL/lib" --reread_libs --rom_model -o "gpt_21.out" "./gpt_21.obj" -l"C:\Program Files\TMS320VC55XCSL-LOWPWR\VC5505_CSL\CCS_v4.0_Examples\cslVC5505\Release\cslvc5505.lib" -l"rts55.lib"

<Linking>

fatal error: file "C:\\Program

Files\\TMS320VC55XCSL-LOWPWR\\VC5505_CSL\\CCS_v4.0_Examples\\cslVC5505\\Rele

ase\\cslvc5505.lib<vectors.obj>" has a Tag_Memory_Model attribute value of

"2" that is different than one previously seen ("1"); combining incompatible

files

>> Compilation failure

C:\Program Files\Texas Instruments\CCSv4\utils\gmake\gmake: *** [gpt_21.out] Error 1

C:\Program Files\Texas Instruments\CCSv4\utils\gmake\gmake: Target `all' not remade because of errors.

 

  • 0
    Expert 1190 points

    I added the code.

    Martin

     sorry can't get good copy but don't let the spaces get to you

    opened and got visual ++, select all , copy

    did paste into post.

     

    #include

    "csl_gpt.h"

    #include

     

    #include

    <stdio.h>

     

    /* CPU register declaration*/

    #define

     

    *)0x0000

    #define

     

     

    IFR0 *(volatile unsigned

    *)0x0001

    #define

     

     

    ST0_55 *(volatile unsigned

    *)0x0002

    #define

     

     

    ST1_55 *(volatile unsigned

    *)0x0003

    #define

     

     

    ST3_55 *(volatile unsigned

    *)0x0004

    #define

     

     

    IER1 *(volatile unsigned

    *)0x0045

    #define

     

     

    IFR1 *(volatile unsigned

    *)0x0046

     

    /* Timer register declaration*/

    #define

     

     

    CPU_TIM0_CTRL ((ioport volatile unsigned

    *)0x1810)

    #define

     

     

    CPU_TIM0_PLWR ((ioport volatile unsigned

    *)0x1812)

    #define

     

     

    CPU_TIM0_PHWR ((ioport volatile unsigned

    *)0x1813)

    #define

     

     

    CPU_TIM0_CLWR ((ioport volatile unsigned

    *)0x1814)

    #define

     

     

    CPU_TIM0_CHWR ((ioport volatile unsigned

    *)0x1815)

    #define

     

     

    CPU_TIM0_IER ((ioport volatile unsigned

    *)0x1816)

    #define

     

     

    CPU_TIMINT_AGGR ((ioport volatile unsigned

    *)0x1c14)

    #define

     

     

    CPU_PRCR ((ioport volatile unsigned

    *)0x1c05)

     

    extern

     

     

    void VECSTART(void

    );

    CSL_GptObj gptObj;

    Uint16 hitIsr;

    CSL_Handle hGpt;

    CSL_Status status;

     

    　

    /*

    This is interrupt sub-routin,

    In the occorance of interrupt

    this function will tigger.

    */

    void

     

     

    Timer_isr1(void )

    {

    ioport 

     

    Uint16 *iafrReg;

    IRQ_clear(TINT_EVENT);

    /* Reset Interrupt Aggregation Flag Registers */

    iafrReg = (ioport 

     

     

    switch

    (hGpt->Instance)

    {

     

     

    case

    GPT_0:

    (*iafrReg) = CSL_IAFR_TIMER_FLAG_0_RESETVAL;

     

     

    break

    ;

     

     

    case

    GPT_1:

    (*iafrReg) = CSL_IAFR_TIMER_FLAG_1_RESETVAL;

     

     

    break

    ;

     

     

    case

    GPT_2:

    (*iafrReg) = CSL_IAFR_TIMER_FLAG_2_RESETVAL;

     

     

    break

    ;

     

     

    default

    :

    (*iafrReg) = CSL_IAFR_TIMER_FLAG_0_1_2_RESETVAL;

    }

    printf(

     

    "ISR Success\n"

    );

    }

     

    　

    　

    interrupt

     

    void Timer_isr2(void

    )

    //void Timer_isr2(void)

    {

     

     

    // clear timer int flag

    IFR0 = IFR0&0x0010;

     

     

     

    /* clear timer0 int flag*/

    *CPU_TIM0_IER = 0x0001;

     

     

     

    /* Clear Timer0 bit in Timer Aggregate register*/

    *CPU_TIMINT_AGGR = *CPU_TIMINT_AGGR | 0x0001 ;

    printf(

     

    "ISR Success\n"

    );

    }

     

    　

    　

    　

    void

     

     

    gpt_IntcSample(void

    )

    {

    CSL_Config hwConfig;

     

    IRQ_clear(TINT_EVENT);

     

    hGpt = (CSL_GptObj *)GPT_open (GPT_0, &gptObj, &status);

    GPT_reset(hGpt);

     

    IRQ_setVecs((Uint32)(&VECSTART));

    IRQ_plug(TINT_EVENT, &Timer_isr2);

    IRQ_enable(TINT_EVENT);

     

    hwConfig.autoLoad = GPT_AUTO_ENABLE;

    hwConfig.ctrlTim = GPT_TIMER_ENABLE;

    hwConfig.preScaleDiv = GPT_PRE_SC_DIV_0;

    hwConfig.prdLow = 0xFFFF;

    hwConfig.prdHigh = 0x0000;

     

    GPT_config(hGpt, &hwConfig);

    GPT_start(hGpt);

    }

     

    　

    /*

    The main function

    */

    void

     

     

    main()

    {

    IRQ_globalDisable();

    gpt_IntcSample();

    IRQ_globalEnable();

     

     

     

    while

    (1);

    volatile Uint16 *)CSL_IAFR_REGS; volatile     IER0 *(volatile unsigned "csl_intc.h"

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

    　

    #include

     

     

    "csl_gpt.h"

    #include

     

     

    "csl_intc.h"

    #include

     

     

    <stdio.h>

     

    /* CPU register declaration*/

    #define

     

     

    IER0 *(volatile unsigned

    *)0x0000

    #define

     

     

    IFR0 *(volatile unsigned

    *)0x0001

    #define

     

     

    ST0_55 *(volatile unsigned

    *)0x0002

    #define

     

     

    ST1_55 *(volatile unsigned

    *)0x0003

    #define

     

     

    ST3_55 *(volatile unsigned

    *)0x0004

    #define

     

     

    IER1 *(volatile unsigned

    *)0x0045

    #define

     

     

    IFR1 *(volatile unsigned

    *)0x0046

     

    /* Timer register declaration*/

    #define

     

     

    CPU_TIM0_CTRL ((ioport volatile unsigned

    *)0x1810)

    #define

     

     

    CPU_TIM0_PLWR ((ioport volatile unsigned

    *)0x1812)

    #define

     

     

    CPU_TIM0_PHWR ((ioport volatile unsigned

    *)0x1813)

    #define

     

     

    CPU_TIM0_CLWR ((ioport volatile unsigned

    *)0x1814)

    #define

     

     

    CPU_TIM0_CHWR ((ioport volatile unsigned

    *)0x1815)

    #define

     

     

    CPU_TIM0_IER ((ioport volatile unsigned

    *)0x1816)

    #define

     

     

    CPU_TIMINT_AGGR ((ioport volatile unsigned

    *)0x1c14)

    #define

     

     

    CPU_PRCR ((ioport volatile unsigned

    *)0x1c05)

     

    extern

     

     

    void VECSTART(void

    );

    CSL_GptObj gptObj;

    Uint16 hitIsr;

    CSL_Handle hGpt;

    CSL_Status status;

     

    　

    /*

    This is interrupt sub-routin,

    In the occorance of interrupt

    this function will tigger.

    */

    void

     

     

    Timer_isr1(void

    )

    {

    ioport

     

    volatile

    Uint16 *iafrReg;

    IRQ_clear(TINT_EVENT);

     

     

    /* Reset Interrupt Aggregation Flag Registers */

    iafrReg = (ioport

     

    volatile

    Uint16 *)CSL_IAFR_REGS;

     

     

    switch

    (hGpt->Instance)

    {

     

     

    case

    GPT_0:

    (*iafrReg) = CSL_IAFR_TIMER_FLAG_0_RESETVAL;

     

     

    break

    ;

     

     

    case

    GPT_1:

    (*iafrReg) = CSL_IAFR_TIMER_FLAG_1_RESETVAL;

     

     

    break

    ;

     

     

    case

    GPT_2:

    (*iafrReg) = CSL_IAFR_TIMER_FLAG_2_RESETVAL;

     

     

    break

    ;

     

     

    default

    :

    (*iafrReg) = CSL_IAFR_TIMER_FLAG_0_1_2_RESETVAL;

    }

    printf(

     

    "ISR Success\n"

    );

    }

     

    　

    　

    interrupt

     

    void Timer_isr2(void

    )

    //void Timer_isr2(void)

    {

     

     

    // clear timer int flag

    IFR0 = IFR0&0x0010;

     

     

     

    /* clear timer0 int flag*/

    *CPU_TIM0_IER = 0x0001;

     

     

     

    /* Clear Timer0 bit in Timer Aggregate register*/

    *CPU_TIMINT_AGGR = *CPU_TIMINT_AGGR | 0x0001 ;

    printf(

     

    "ISR Success\n"

    );

    }

     

    　

    　

    　

    void

     

     

    gpt_IntcSample(void

    )

    {

    CSL_Config hwConfig;

     

    IRQ_clear(TINT_EVENT);

     

    hGpt = (CSL_GptObj *)GPT_open (GPT_0, &gptObj, &status);

    GPT_reset(hGpt);

     

    IRQ_setVecs((Uint32)(&VECSTART));

    IRQ_plug(TINT_EVENT, &Timer_isr2);

    IRQ_enable(TINT_EVENT);

     

    hwConfig.autoLoad = GPT_AUTO_ENABLE;

    hwConfig.ctrlTim = GPT_TIMER_ENABLE;

    hwConfig.preScaleDiv = GPT_PRE_SC_DIV_0;

    hwConfig.prdLow = 0xFFFF;

    hwConfig.prdHigh = 0x0000;

     

    GPT_config(hGpt, &hwConfig);

    GPT_start(hGpt);

    }

     

    　

    /*

    The main function

    */

    void

     

     

    main()

    {

    IRQ_globalDisable();

    gpt_IntcSample();

    IRQ_globalEnable();

     

     

     

    while

    (1);