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C553x: Confirm the assert timing of Reset pin

Guru 24520 points

Hi Community member,

Please let me confirm my question as below.

[Question]

Is there any problem for device operation to assert of reset pin before not being stable RTC clock?

According to datasheet of C5535, Reset pin must be held low until all of the power supplies reach their operating voltage conditions.

So, I think that there is not any problem for the device operation to do it.

Would you please your comments for my question by end of today(4th /Sep) in US time?

If you have any questions, please let me know.

Best regards.

Kaka

  • Kato-san,

    The RTC has its own power-on-reset (POR) circuit which resets the registers in the RTC core domain when power is first applied to the CVDDRTC power pin. The RTC flops are not reset by the device's RESET pin nor the digital core's POR (powergood signal). You can find this documented in the data manual Real-Time Clock (RTC) section.

    Regards.

  • Kaka-san,

    What is the state of CLK_SEL pin?

    If CLK_SEL = 0, then RTC clock is used for SYSCLK during the bootloader.

    In that case, the RTC oscillator must be stable before being used. Time to stabilize depends on the ESR and  capacitive load of crystal. It can take up to 2 seconds.

    Regards,
    Mark

  • Hi Steve,

    Thank you for your response.

    However, I am afraid that I could not understand your answer for my question.

    Do you want to tell me that if the device was reset by reset pin, the RTC domain did not influence for the operation?

    Hi Mark,

    Thank you for your response.

    CLK_SEL pin is "L". Thus, we need to tell customer that they need to wait until the RTC oscillator must be stable.

    By the way, can we find the your description in data manual?

    If no, I think that you should describe it to datasheet or application reference.

    Best regards,

    Kaka

  • Kaka-san,

    The RTC oscillator parameters including worst case start up time 2s is in Table 6-1 of the datasheet.

    The datasheet is not clear about crystal stability before releasing reset, but this crystal app note from MSP430 has general information: http://www.ti.com/lit/an/slaa322b/slaa322b.pdf

    "Start-up times between several hundred milliseconds and a few seconds are normal values for low-frequency tuning-fork crystals, like 32768-Hz crystals."

    What is the state of DSP_LDO_EN? How long after power up does RESET assert low?

    I will file a datasheet bug to clarify RTC crystal stability requirements

    Hope this helps,
    Mark

  • Kata-san,

    No. reset pin does influence the RTC module.

    Hope this help.

    Regards.