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Capture driver for TVP5147 on Mistral EVM (DM814x) and dvr-rdk from udworks

Marat Shchuchinsky
Expert 2595 points
Other Parts Discussed in Thread: TVP5158, TVP5147

Hello TI' teams,

At company started new project for DM8148. As EVM we use DM8148 EVM from Mistral with all sub-boards. I mean capture and LCD sub-boards. At company choose DVR-RDK from udworks (currently we works with latest version - 3.50) as main frame-work for our projects. This version compiled without any problem for 8148, and kernel and NFS file system both works looking without any problem too. I want to use one from usecases supplied with mcfw: capture -> encode -> decode -> LCD display and RTP stremming in parallel to local display. Currently I have a problem wit capture driver, because Mistral EVM supplied with TVP5147 video decoder and this chip isn't supported by udworks dvr-rdk. Only TVP5158 supported by udworks. I need to implement this capture driver and I have a some simple questions that help me on my way:

1) because capture driver (I mean capture driver for TVP51xx like video decoder) on udworks dvr-rdk serviced by HDVPSS subsytem that runs on Cortex-M3 - I need implement capture driver only for this subsystem and no need implement kernel driver for Linux or modify Linux kernel to service TVP5147 on A8 subsystem. On M3 I nead to "bind" hdvpss with DM5147 decoder. Please let me know - is this right way?

2) Please let me know - how I can upload patch for TVP5147? I have a code example only for TVP5158 patch upload

3) Am I understood correctly - TVP5147 has ony one video decoder per chip, opposite to TVP5158 that have 4 video decoders per chip.

4) Where I can to see simple example or document described in details - how this driver must be implemented.

 

Thank you very much for an help.

Regards.

 

  • 0
    TI__Guru 59700 points

    Marat Shchuchinsky said:
    1) because capture driver (I mean capture driver for TVP51xx like video decoder) on udworks dvr-rdk serviced by HDVPSS subsytem that runs on Cortex-M3 - I need implement capture driver only for this subsystem and no need implement kernel driver for Linux or modify Linux kernel to service TVP5147 on A8 subsystem. On M3 I nead to "bind" hdvpss with DM5147 decoder. Please let me know - is this right way?

    External Video Decoder like 5147/5148 are not controlled on the HDVPSS in DVR RDK. They are controlled from A8 .

    Refer the /dvr_rdk/mcfw/src_linux/devices folder for external video decoder implementations.

    You can refer TVP5158 implementation and implement similar APIs for 5147. You can also set configureExterlDecoder = FALSE and use direct i2c commands to correctly configure 5147.

    You only need to configure correct VIP parameters in captureLink.

     

  • 0 in reply to Badri Narayanan
    Expert 2595 points

    Hello Badri,

    I'm very glad to you for quick responce. But,

    • I've seen TVP5158 implementation, but I have not seen that a separate module tvp5158.ko builds.
    • "You only need to configure correct VIP parameters in captureLink" - you mean CaptureLink_CreateParams?
    • Please let me know is there any way to capture by DM8148 the data as black and white image (not color, not YUV, etc..) with 16 bits depth - capture device in our target must be IR video sensor and FPGA that produce frame with D1 size and 14 effective bits per pixel. BT656 allow only 8 bits per pixel.

    Thank alot again.

  • 0 in reply to Marat Shchuchinsky
    TI__Guru 59700 points

    There is no tvp5158.ko. TVP5158 is configured via userspace i2c control calls.

     

    Marat Shchuchinsky said:
    "You only need to configure correct VIP parameters in captureLink" - you mean CaptureLink_CreateParams?

    - That is correct. You can search the 814x/816x forum where several customers have integrated their own video decoders into DVR RDK.

    Marat Shchuchinsky said:
    Please let me know is there any way to capture by DM8148 the data as black and white image (not color, not YUV, etc..) with 16 bits depth - capture device in our target must be IR video sensor and FPGA that produce frame with D1 size and 14 effective bits per pixel. BT656 allow only 8 bits per pixel.

    Pls raise this a new thread so that some expert can comment. Will you be capturing via the Imaging Subsystem (ISS) or VIP ?