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AM3874 CS0 not asserted after reset is released

Poh Boon Teo
Intellectual 710 points
Other Parts Discussed in Thread: AM3874

Hi,

I did not see the CS0 on my board get asserted after the reset is released.

Fyi, I am not using the PMIC recommended for the CPU and was using my DC core solution to implement the power sequencing.

I have exhausted all the possibilities I can think of for this not to work (e.g. bootmode, checking on sequencing, clean up ripples....). I am running out of idea on where to look for in order for the CPU to assert the CS0 after reset, anyone has gone through this before? Care to share with me?

Thanks and regards,

poh boon

  • 0
    TI__Guru**** 170625 points

    Hi Poh,

    This can be HW malfunction. Please double check you custom board design with the help of:

    http://processors.wiki.ti.com/index.php/AM387x_/_C6A814x_Schematic_Review_Checklist

    AM3874 datasheet

    DM814x/AM387x Mistral EVM reference schematic

    Best regards,
    Pavel

  • 0 in reply to Pavel Botev
    Intellectual 710 points

    Hi Pavel,

    I notice on the Mistral EVM, the CS0 will toggle upon releasing the power on reset but on my custom board, the CS0 is not toggling at all even though I attempt to perform a power on reset a few times.

    I would like to know what may cause this to happen as this is something internal to the TI CPU.

    I notice that the core voltage is running at 1.2V while my custom board is running at 1.1V, is that going to be a problem to CS0 issue?

    I am pretty stucked here and do not know how to proceed., please advise.

    Thanks and regards,

    poh boon

  • 0 in reply to Poh Boon Teo
    Intellectual 710 points

    Hi,

    I have found out why the CS0 refuse to toggle even though I choose to boot up from Nand flash.

    On my custom board, I have the data lines connected to a DSP and CPLD as well. By removing the DSP and configuring the CPLD with weak pull up, I was able to get my board boot up from the Nand flash.

    However, one question is that how come the ROM bootloader seems to monitor the data lines when the boot mode is set to boot from Nand flash before it toggles the CS0?

    Can any TI experts explain to me?

    Thanks and regards,

    poh boon

  • 0 in reply to Poh Boon Teo
    TI__Guru**** 170625 points

    Hi Poh,

    You can refer to the AM387x TRM, chapter 4 ROM Code, section 4.7.3 NAND

    Regards,
    Pavel