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OMAP L138 custom board standalone problems

Other Parts Discussed in Thread: SYSBIOS, OMAP-L138, OMAPL138, OMAP-L137

Hey there,

I don't know if this question suppose to be here or in the SYS\BIOS forum so sorry in advance...

I have a program built in SYS\BIOS working with the ARM and the DSP, communicating by IPC.

I have a custom board which has the Logic PD Omap L138 SOM on it.

I manage to load ARM only program working with SYS\BIOS to the SPI1 Flash and run the board in standalone mode but when I try to run the whole 2 processors program, it doesn't work. I tried debugging the code but It just hangs in random places before to IPC start is over.

I'm pretty sure I made the AIS files fine (according to the "C6000 Embedded Design Workshop Using BIOS - Booting From Flash") and here is my extra .cmd file for the DSP:

SECTIONS
{
.cinit > DDR
.text:_c_int00 > DDR
.text > DDR
}

Is there something specific I need to know in order to make this thing work?

Appreciate the help,

Yoel

  • Yoel,

    Thanks for your post.

    Verify the DSP wakeup routine, it may give the issue and you have mentioned ARM alone is working. Only the memory section provided is not enough to give the technical suggestion.
    Refer the below wiki page for flashing and booting images to/from SPI
    http://processors.wiki.ti.com/index.php/GSG:_OMAP-L138_DVEVM_Additional_Procedures#DSP_wakeup_in_U-Boot

    Please have a look at the section "Modifications for Custom Boards" in the below wiki,
    http://processors.wiki.ti.com/index.php/Serial_Boot_and_Flash_Loading_Utility_for_OMAP-L138

  • Hey Pubesh,

    Thanks for the fast reply!

    I read the articles you sent and many more but I still can't get the DSP to work.

    I attached the simple ARM+DSP programs that uses notify and push a LED on and of and I can't get it to work.

    In the RAR archive there is also the CFG script from the AIS gen I used.

    I flash the LogicPD SOM with UART2 trough serial cable. I tried the SPI Flash utility but the code hangs after I insert the AIS filename, I couldn't find any modification to do...

    I have a big presentation the day after tomorrow and this is the only thing that holding me.

    Hope you can help, please tell me if there is any more information I can supply.

    Here is the code:

    4505.Omap_Tes.rar

    Thanks, 

    Yoel

  • Hello,

    Still can't find a solution.

    Please Help...

  • Omap L138 - ARM+DSP, SYS\BIOS, simple notify example...

    Am I the only one in the world that need this system to run as standalone?

    All I wan't is a simple explanation on how to run the system from flash.

    I read all the wiki's and manuals and I can put the links here myself so please don't refer me to any of those.

    Here is the program, again: 2538.Omap_Tes.rar

    I need your help.

    Yoel

  • Yoel,

    Please provide the version of SysBios and IPC used by you.
    Did you modify the notify example for standalone board.
    Queries on SYSBIOS (notify) are best handled by RTOS Forum.
    I recommend for your post to RTOS Forum to get appropriate assistance.
    I'll do my best to support you here, but we are reaching the limits of my expertise with this.

  • IPC 1.25.0.4

    SYS\BIOS 6.34.2.18

    I did modify the example so it would blink a LED (and I can know it's working).

    I will post it on RTOS Forum as well.

    Thanks,

    Yoel

  • You might need to add code your ARM code to start the DSP. I believe the ROMBL will stop the DSP after loading the DSP image. There are examples of doing that in DSPLink and at this link

    http://processors.wiki.ti.com/index.php/Boot_Images_for_OMAP-L138#Booting_DSP_Binaries

    see "Sample code and bootable images"

    http://processors.wiki.ti.com/images/3/32/OMAPL138-DSP-LED-v4.zip

    The ARM code from the above example is below with your entry point of 0x11800000.

    #include <cslr.h>
    #include <cslr_syscfg0_OMAPL138.h>
    #include <soc_OMAPL138.h>
    #define SYS_BASE           0x01C14000
    #define KICK0Ra             *(unsigned int*)(SYS_BASE + 0x038)
    #define KICK1Ra             *(unsigned int*)(SYS_BASE + 0x03c)

    CSL_SyscfgRegsOvly SYS_REGS = (CSL_SyscfgRegsOvly)CSL_SYSCFG_0_REGS;
    CSL_PscRegsOvly psc0Regs = (CSL_PscRegsOvly) CSL_PSC_0_REGS;

    int main (void)
    {

      // Open Permissions to SYSCFG Registers (Not required for PG2.0 silicon and above)
      KICK0Ra = 0x83e70b13;
      KICK1Ra = 0x95A4F1E0;

      /* Set DSP boot address vector to entry point of DSP program
      This must be aligned to 1KB boundaries */
      SYS_REGS->HOST1CFG = 0x11800000;

      /* Wake up the DSP */
      CSL_FINST(psc0Regs->MDCTL[CSL_PSC_DSP], PSC_MDCTL_NEXT, ENABLE);
      CSL_FINST(psc0Regs->PTCMD, PSC_PTCMD_GO1, SET);
      while(CSL_FEXT(psc0Regs->PTSTAT, PSC_PTSTAT_GOSTAT1)==CSL_PSC_PTSTAT_GOSTAT1_IN_TRANSITION);
      CSL_FINST(psc0Regs->MDCTL[CSL_PSC_DSP], PSC_MDCTL_LRST, DEASSERT);
      ...

    Note that the above code should only be run in standalone. It should not be used where the DSP and ARM are under emulator control.

    Just a guess. I've never actually had used the ROMBL load up both DSP and ARM on the OMAP-L138. On the OMAP-L137, it's a series of bootloaders bouncing back and forth between processors.

  • Hey Norman,

    You where right!

    I did tell the ARM where the code starts in the DSP core but I didn't wake it up (In my Concetro, the SYS\BIOS does that simply by checking a box in the config file).

    In the DSP side, I needed to add the following line to the .cmd file:

    .text:_c_int00: align=1024 > 0x80010000

    At the ARM side, I had to add the following function before the IPC_Start:

    /* Wake up the DSP */
    Void DSPWakeup()
    {
      // Open Permissions to SYSCFG Registers (Not required for PG2.0 silicon and above)
      HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_KICK0R) = 0x83e70b13;
      HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_KICK1R) = 0x95A4F1E0;

      /* Set DSP boot address vector to entry point of DSP program
      This must be aligned to 1KB boundaries */
      HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_HOST1CFG) = 0x80010000;

      /*
      * Write a 3h to the NEXT bit in the DSP local power sleep controller (LPSC) module control register
      * (PSC0.MDCTL15) to prepare the DSP module for an enable transition (to enable the clocks and all
      * transitioning from the SwRstDisable state to Enable state)
      */
      HWREG(SOC_PSC_0_REGS + PSC_MDCTL(HW_PSC_DSP)) |= 0x00000003;

      /*
      * Write a 1 to the GO[1] bit (DSP subsystem is part of the PD_DSP domain) in the power domain
      * transition command register (PSC0.PTCMD) to start the state transition sequence for the DSP module
      */
      HWREG(SOC_PSC_0_REGS + PSC_PTCMD) |= 0x00000002;

      /*
      * Check (poll for 0) the GOSTAT[1] bit in the power domain transition status register (PSC0.PTSTAT) for
      * power transition sequence completion. The domain is only safely in the new state after the GOSTAT[1]
      * bit is cleared to 0
      */
      unsigned int gostat1 = HWREG(SOC_PSC_0_REGS + PSC_PTSTAT);
      while((gostat1&PSC_PTSTAT_GOSTAT1)!=0);

      /*
      * Write a 1 to the LRST bit in PSC0.MDCTL15 to release the DSP local reset controlled by the PSC
      * module
      */
      HWREG(SOC_PSC_0_REGS + PSC_MDCTL(HW_PSC_DSP)) |= 0x00000100;
    }

    Thanks for the help!

    Yoel