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AM3517 silicon revision identification in Software

Richard A Hendricks
Prodigy 70 points
Other Parts Discussed in Thread: AM3517

Hello,

  How do we distinguish between the ES1.0 and 1.1 silicon revisions on the AM3517?  The errata for the AM3517 has Advisory 1.1.23:

Advisory 1.1.23 CONTROL_REVISION Register Not Aligned With Silicon Revision

Revision(s) Affected 1.1 and earlier
Details CONTROL_REVISION register contains the same value (0x00000010) for each silicon
revision.
Workaround(s) Use CONTROL_IDCODE, which is upgraded for each silicon revision and documented
in the AM35x ARM Microprocessor Technical Reference Manual (Literature Number:
SPRUGR0 ).

However the latest AM3517 TRM, revision B, contains in section 1.4.2:

Table 1-5. CONTROL_IDCODE Register Definition
Field Bits Value Comment
CONTROL.CONTROL_IDCODE [31:28] VERSION Revision number
CONTROL.CONTROL_IDCODE [27:12] HAWKEYE See Table 1-6. Hawkeye number
CONTROL.CONTROL_IDCODE [11:1] TI_IDM 0x13 Manufacturer identity (TI)
CONTROL.CONTROL_IDCODE [0] -- 0x1 Always set to 1.
The Hawkeye number is hardcoded in the design. Table 1-6 lists the Hawkeye number values.

Table 1-6. Hawkeye Number Value
Silicon Type Field Value
ES1.0 CONTROL.CONTROL_IDCODE[27:12] 0xB868

There is no table entry for the newer 1.1 silicon.

  • 0
    TI__Genius 13505 points

    Richard,

    I dug around in the linux kernel for AM335x and I think I found the answer.  The MSB of CONTROL.CONTROL_IDCODE contains the version id.  If the ID is 0, you have an ES1.0 part, and if the ID is 1 (or perhaps anything besides 0), you have an ES1.1 part.

    Here is an excerpt from /arch/arm/mach-omap2/id.c 

    idcode = read_tap_reg(OMAP_TAP_IDCODE);
    hawkeye = (idcode >> 12) & 0xffff;
    rev = (idcode >> 28) & 0xff;

    switch (hawkeye) {

    case 0xb868:
    /*
    * Handle OMAP/AM 3505/3517 devices
    *
    * Set the device to be OMAP3517 here. Actual device
    * is identified later based on the features.
    */
      switch (rev) {
      case 0:
        omap_revision = OMAP3517_REV_ES1_0;
        cpu_rev = "1.0";
        break;
      case 1:
        /* FALLTHROUGH */
      default:
        omap_revision = OMAP3517_REV_ES1_1;
        cpu_rev = "1.1";

  • 0 in reply to Michael Erdahl
    Prodigy 70 points

    Michael,

      Thanks for the update, that aligns with what we saw as well.  Will an update to the Sitara TRM be published?

  • 0 in reply to Richard A Hendricks
    TI__Genius 13505 points

    Richard,

    Glad to have helped.  I submitted feedback to the document owners.  

    Regards,

    Mike