• State
  • Locked Locked
  • Replies 2 replies
  • Subscribers 99 subscribers
  • Views 272 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DM3730 Camera ISP clock output

Rob C
Prodigy 30 points
Other Parts Discussed in Thread: DM3730, SYSCONFIG

We are interfacing a 3M pixel 8bit parallel interface camera to the DM3730 and are unable to get the CAM_XCLK pin from the DM3730 to output a clock

Can you please confirm if we have set the following registers up correctly

PID:00400002 TID:00890006 ************** ISP CTRL **************

PID:00400002 TID:00890006 REVISION                      0x000000f0

PID:00400002 TID:00890006 SYSCONFIG                     0x00001000

PID:00400002 TID:00890006 SYSSTATUS                     0x00000001

PID:00400002 TID:00890006 IRQ0ENABLE                    0xf33f7fff

PID:00400002 TID:00890006 IRQ0STATUS                    0x00000000

PID:00400002 TID:00890006 IRQ1ENABLE                    0x00000000

PID:00400002 TID:00890006 IRQ1STATUS                    0x00000000

PID:00400002 TID:00890006 TCTRL GRESET LENGTH           0x00000000

PID:00400002 TID:00890006 TCTRL PSTRB REPLAY            0x00000000

PID:00400002 TID:00890006 CTRL                          0x201d8140

PID:00400002 TID:00890006 SECURE                        0x00000ÿ000

PID:00400002 TID:00890006 TCTRL_CTRL                    0x00000000

PID:00400002 TID:00890006 TCTRL_FRAME                   0x000c0000

PID:00400002 TID:00890006 TCTRL_PSTRB_DELAY             0x00000000

PID:00400002 TID:00890006 TCTRL_STRB_DELAY              0x00000000

PID:00400002 TID:00890006 TCTRL_SHUT_DELAY              0x00000000

PID:00400002 TID:00890006 TCTRL_PSTRB_LENGTH            0x00000000

PID:00400002 TID:00890006ÿ TCTRL_STRB_LENGTH            0x00000000

PID:00400002 TID:00890006 TCTRL_SHUT_LENGTH             0x00000000

PID:00400002 TID:00890006 PING_PONG_ADDR                0x00000000

PID:00400002 TID:00890006 PING_PONG_MEM_RANGE           0x00000000

PID:00400002 TID:00890006 PING_PONG_BUF_SIZE            0x00000000

PID:00400002 TID:00890006 ***************** CCDC ****************

PID:00400002 TID:00890006 PID                           0x0001fe01

PID:00400002 TID:00890006 PCR                           0x00000001

PID:00400002 TID:00890006 SYN MODE                      0x00030e80

PID:00400002 TID:00890006 HD VD WID                     0x00000000

PID:00400002 TID:00890006 PIX LINES                     0x00000000

PID:00400002 TID:00890006 HORZ INFO                     0x003c057f

PID:00400002 TID:00890006 VERT START                    0x00140014

PID:00400002 TID:00890006 VERT LINES                    0x0000011f

PID:00400002 TID:00890006 CULLING                       0xffff00ff

PID:00400002 TID:00890006 VERT HSIZE OFF                0x00000580

PID:00400002 TID:00890006 SDOFST                        0x00000249

PID:00400002 TID:00890006 SDR ADDR                      0x8692b000

PID:00400002 TID:00890006 CLAMP                         0x00000010

PID:00400002 TID:00890006 DCSUB                         0x0000ÿ0000

PID:00400002 TID:00890006 COLTPIN                       0x00000000

PID:00400002 TID:00890006 BLKCMP                        0x00000000

PID:00400002 TID:00890006 FPC                           0x00000000

PID:00400002 TID:00890006 FPC ADDR                      0x00000000

PID:00400002 TID:00890006 VDINT                         0x00000000

PID:00400002 TID:00890006 ALAW                          0x00000004

PID:00400002 TID:00890006 REC656IF                      0x00000001

PID:00400002 TID:00890006 CFG                           0x00009040

PID:00400002 TID:00890006 FMTCFG                        0x00004000

PID:00400002 TID:00890006 FMT HORZ                      0x00000ÿ000

PID:00400002 TID:00890006 FMT VERT                      0x00000000

PID:00400002 TID:00890006 FMT ADDR0                     0x00000000

PID:00400002 TID:00890006 FMT ADDR1                     0x00000000

PID:00400002 TID:00890006 FMT ADDR2                     0x00000000

PID:00400002 TID:00890006 FMT ADDR3                     0x00000000

PID:00400002 TID:00890006 FMT ADDR4                     0x00000000

PID:00400002 TID:00890006 FMT ADDR5                     0x00000000

PID:00400002 TID:00890006 FMT ADDR6                     0x00000000

PID:00400002 TID:00890006 FMT ADDR7                     0x00000000

PID:00400002 TID:00890006 PRGEVEN0                      0x00000000

PID:00400002 TID:00890006 PRGEVEN1                      0x00000000

PID:00400002 TID:00890006 PRGODD0                       0x00000000

PID:00400002 TID:00890006 PRGODD1                       0x00000000

PID:00400002 TID:00890006 VP OUT                        0x00000000

PID:00400002 TID:00890006 LSC CONFIG                    0x00006600

PID:00400002 TID:00890006 LSC INITIAL                   0x00000000

PID:00400002 TID:00890006 LSC TABLE_BASE                0x00000000

PID:00400002 TID:00890006 LSC TABLE_OFFSET              0x00000000

PID:00400002 TID:00890006 *** CAMERA GPIO ***

PID:00400002 TID:00890006 0x4800210c = 0x00000108

PID:00400002 TID:00890006 0x4800210e = 0x00000108

PID:00400002 TID:00890006 0x48002110 =ÿ 0x00000000

PID:00400002 TID:00890006 0x48002112 = 0x00000108

PID:00400002 TID:00890006 0x48002114 = 0x0000010c

PID:00400002 TID:00890006 0x48002116 = 0x00000100

PID:00400002 TID:00890006 0x48002118 = 0x00000100

PID:00400002 TID:00890006 0x4800211a = 0x00000100

PID:00400002 TID:00890006 0x4800211c = 0x00000100

PID:00400002 TID:00890006 0x4800211e = 0x00000100

PID:00400002 TID:00890006 0x48002120 = 0x00000100

PID:00400002 TID:00890006 0x48002122 = 0x00000100

PID:00400002 TID:00890006 0x48002124 = 0x00000100

PID:00400002 TID:00890006 0x48002126 = 0x00000100

PID:00400002 TID:00890006 0x48002128 = 0x00000100

PID:00400002 TID:00890006 0x4800212a = 0x00000104

PID:00400002 TID:00890006 0x4800212c = 0x00000104

PID:00400002 TID:00890006 0x4800212e = 0x00000104

PID:00400002 TID:00890006 0x48002130 = 0x00000004

PID:00400002 TID:00890006 0x48002132 = 0x00000000

PID:00400002 TID:00890006 ****** CAMERA CLOCKS ******

PID:00400002 TID:00890006 CM_FCLKEN_CAM    = 0x00000003

PID:00400002 TID:00890006 CM_ICLKEN_CAM    = 0x00000001

PID:00400002 TID:00890006 CM_IDLEST_CAM    = 0x00000000

PID:00400002 TID:00890006 CM_AUTOIDLE_CAM  = 0x00000001

PID:00400002 TID:00890006 CM_CLKSEL_CAM    = 0x00000004

PID:00400002 TID:00890006 CM_SLEEPDEP_CAM  = 0x00000002

PID:00400002 TID:00890006 CM_CLKSTCTRL_CAM = 0x00000003

PID:00400002 TID:00890006 CM_CLKSTST_CAM   = 0x00000001

PID:00400002 TID:00890006 CLOCK CONTROL    = 0x00770007

  • 0
    Guru 31670 points

    Hi Rob,

    Have you verified whether the control pad registers (MUX) for the clk pin is configured correctly? Can you share the portion of the schematics where the lines are connected to 3730?

  • 0
    TI__Guru 65405 points

    Hi RobC,

    I recommend you follow the description for complete configuration in the section 6.5 Camera ISP Basic Programming Model of TRM at the link:

    http://www.ti.com/lit/ug/sprugn4r/sprugn4r.pdf

    About the CAM_XCLK pin you should check the pin mux whether it is configured in mode0 (no mode4 which makes it gpio).

    The cam_xclka clock frequency is set through the TCTRL_CTRL[4:0] DIVA bit field. The cam_xclkb clock frequency is set through the TCTRL_CTRL[9:5] DIVB bit field. One can change the divisor values at any time.

    As I see your registers dump the TCTRL_CTRL has value 0x00000000 but if the devisor has values 0, 1, and 31, the divider is not enabled. The configured value 0 means that CAM.XCLKA and CAM.XCLKB will have stable low level. Divider disabled. For all other values:

    • cam_xclka = cam_mclk/TCTRL_CTRL[4:0] DIVA
    • cam_xclkb = cam_mclk/TCTRL_CTRL[9:5] DIVB

    BR

    Tsvetolin Shulev